公开(公告)号：US20190164603A1

公开(公告)日：2019-05-30

申请号：US16243796

申请日：2019-01-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-Soo PYO ,  HYUNTAEK JUNG ,  TAEJOONG SONG ,  BOYOUNG SEO

IPC: G11C13/00 ,  G11C11/16

CPC classification number: G11C13/0064 ,  G11C11/1653 ,  G11C11/1655 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1677 ,  G11C11/1693 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/0073 ,  G11C2213/74 ,  G11C2213/79 ,  G11C2213/82

Abstract: A nonvolatile memory device includes a first variable resistance element connected to a first bit line, and a first transmission ;ate connected between the first variable resistance element and a first source line. The first transmission gate includes a first insulating layer formed on a well connected to aground voltage, a first n-channel metal oxide semiconductor (NMOS) transistor formed on the first insulating layer and connected to a first word line, a second insulating layer formed on the well, the second insulating layer being in the same layer as the first insulating layer, and a first p-channel metal oxide semiconductor (PMOS) transistor formed on the second insulating layer and connected to a first write word line.