公开(公告)号：US09245908B2

公开(公告)日：2016-01-26

申请号：US14243694

申请日：2014-04-02

Applicant: Samsung Display Co., Ltd.

Inventor： Jeong-Ho Lee ,  Su-Yeon Sim ,  Ju-Won Yoon ,  Seung-Min Lee ,  Wang-Woo Lee ,  Il-Jeong Lee ,  Jung-Kyu Lee ,  Choong-Youl Im

IPC: H01L27/12 ,  H01L27/32

CPC classification number: H01L27/1255 ,  H01L27/1237 ,  H01L27/1288

Abstract: A method of manufacturing a thin film transistor (TFT) array substrate is disclosed. In one aspect, the method includes forming an active layer on a substrate, forming a first insulating layer on the substrate to cover the active layer, and forming a first gate electrode on the first insulating layer in an area corresponding to the active layer, doping the active layer with ion impurities, forming a second insulating layer on the first insulating layer to cover the first gate electrode, performing an annealing process on the active layer, forming a lower electrode of a capacitor on the second insulating layer, forming a third insulating layer on the second insulating layer to cover the lower electrode, wherein the third insulating layer has a dielectric constant that is greater than those of the first and second insulating layers, and forming an upper electrode of the capacitor on the third insulating layer.

Abstract translation: 公开了制造薄膜晶体管（TFT）阵列基板的方法。 一方面，该方法包括在衬底上形成有源层，在衬底上形成第一绝缘层以覆盖有源层，以及在与有源层对应的区域中的第一绝缘层上形成第一栅电极，掺杂 所述有源层具有离子杂质，在所述第一绝缘层上形成第二绝缘层以覆盖所述第一栅电极，对所述有源层执行退火处理，在所述第二绝缘层上形成电容器的下电极，形成第三绝缘层 在第二绝缘层上覆盖下电极，其中第三绝缘层的介电常数大于第一和第二绝缘层的介电常数，并且在第三绝缘层上形成电容器的上电极。

公开(公告)号：US20150048320A1

公开(公告)日：2015-02-19

申请号：US14243694

申请日：2014-04-02

Applicant: Samsung Display Co., Ltd.

Inventor： Jeong-Ho Lee ,  Su-Yeon Sim ,  Ju-Won Yoon ,  Seung-Min Lee ,  Wang-Woo Lee ,  Il-Jeong Lee ,  Jung-Kyu Lee ,  Choong-Youl Im

IPC: H01L27/12 ,  H01L27/32

CPC classification number: H01L27/1255 ,  H01L27/1237 ,  H01L27/1288

Abstract: A method of manufacturing a thin film transistor (TFT) array substrate is disclosed. In one aspect, the method includes forming an active layer on a substrate, forming a first insulating layer on the substrate to cover the active layer, and forming a first gate electrode on the first insulating layer in an area corresponding to the active layer, doping the active layer with ion impurities, forming a second insulating layer on the first insulating layer to cover the first gate electrode, performing an annealing process on the active layer, forming a lower electrode of a capacitor on the second insulating layer, forming a third insulating layer on the second insulating layer to cover the lower electrode, wherein the third insulating layer has a dielectric constant that is greater than those of the first and second insulating layers, and forming an upper electrode of the capacitor on the third insulating layer.

Abstract translation: 公开了制造薄膜晶体管（TFT）阵列基板的方法。 一方面，该方法包括在衬底上形成有源层，在衬底上形成第一绝缘层以覆盖有源层，以及在与有源层对应的区域中的第一绝缘层上形成第一栅电极，掺杂 所述有源层具有离子杂质，在所述第一绝缘层上形成第二绝缘层以覆盖所述第一栅电极，对所述有源层执行退火处理，在所述第二绝缘层上形成电容器的下电极，形成第三绝缘层 在第二绝缘层上覆盖下电极，其中第三绝缘层的介电常数大于第一和第二绝缘层的介电常数，并且在第三绝缘层上形成电容器的上电极。

公开(公告)号：US20150102349A1

公开(公告)日：2015-04-16

申请号：US14242672

申请日：2014-04-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Wang-Woo Lee ,  Moo-Soon Ko ,  Do-Hyung Kim ,  Min-Woo Woo ,  Il-Jeong Lee ,  Jeong-Ho Lee ,  Young-Woo Park

IPC: H01L27/12

CPC classification number: H01L27/1255 ,  H01L27/1251 ,  H01L27/1288

Abstract: A thin film transistor array substrate including a first TFT including a first active layer, a gate electrode, a first source electrode and a first drain electrode, a second TFT including a second active layer, a floating gate electrode, a control gate electrode, a second source electrode, and a second drain electrode, a capacitor including a first electrode and a second electrode, and a capping layer contacting a portion of the first electrode, the capping layer and the second electrode being on a same layer, is disclosed. A method of manufacturing thin film transistor array substrate is also disclosed.

Abstract translation: 一种薄膜晶体管阵列基板，包括包括第一有源层，栅电极，第一源电极和第一漏电极的第一TFT，包括第二有源层的第二TFT，浮栅电极，控制栅电极， 第二源电极和第二漏电极，包括第一电极和第二电极的电容器，以及与第一电极，封盖层和第二电极的一部分在同一层上接触的覆盖层。 还公开了制造薄膜晶体管阵列基板的方法。

公开(公告)号：US09111813B2

公开(公告)日：2015-08-18

申请号：US14307155

申请日：2014-06-17

Applicant: Samsung Display Co, Ltd. ,  DONGWOO FINE-CHEM CO., LTD.

Inventor： Hong-Sick Park ,  Wang-Woo Lee ,  Sang-Tae Kim ,  Joon-Woo Lee ,  Young-Chul Park ,  Young-Jun Jin ,  Kyong-Min Kang ,  Young-Jin Yoon ,  Suck-Jun Lee ,  O-Byoung Kwon ,  In-Ho Yu ,  Sang-Hoon Jang ,  Min-Ki Lim ,  Dong-Ki Kim

IPC: H01L29/04 ,  H01L27/12 ,  H01L21/3213 ,  H01L29/417

CPC classification number: H01L27/127 ,  H01L21/32134 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/41733

Abstract: An etchant includes: 5 to 20 wt % of persulfate, 1 to 10 wt % of at least one compound of an inorganic acid, an inorganic acid salt, or a mixture thereof, 0.3 to 5 wt % of a cyclic amine compound, 1 to 10 wt % of at least one compound of an organic acid, an organic acid salt, or a mixture thereof, 0.1 to 5 wt % of p-toluenesulfonic acid, and water, based on the total weight of the etchant. A copper-titanium etchant further includes 0.01 to 2 wt % of a fluoride-containing compound. A method of forming a display device using the etchant, and a display device, are also disclosed.

Abstract translation: 蚀刻剂包括：5〜20重量％的过硫酸盐，1〜10重量％的至少一种无机酸化合物，无机酸盐或其混合物，0.3〜5重量％的环状胺化合物，1〜 10重量％的至少一种有机酸化合物，有机酸盐或其混合物，0.1至5重量％的对甲苯磺酸和水，基于蚀刻剂的总重量。 另外，铜 - 钛蚀刻剂还含有0.01〜2重量％的含氟化合物。 还公开了使用蚀刻剂形成显示装置的方法和显示装置。

公开(公告)号：US08921230B2

公开(公告)日：2014-12-30

申请号：US13964371

申请日：2013-08-12

Applicant: Samsung Display Co., Ltd.

Inventor： Hong-Sick Park ,  Young-Jun Kim ,  Young-Woo Park ,  Wang-Woo Lee ,  Won-Guk Seo ,  Sam-Young Cho ,  Seung-Yeon Han ,  Gyu-Po Kim ,  Hyun-Cheol Shin ,  Ki-Beom Lee

IPC: H01L21/00 ,  H01L21/67 ,  H01L21/28 ,  H01L27/12 ,  C23F1/18

CPC classification number: C23F1/18 ,  H01L21/67075 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78633 ,  H01L29/7869

Abstract: An etchant composition includes about 25 percent by weight to about 35 percent by weight of phosphoric acid, about 3 percent by weight to about 9 percent by weight of nitric acid, about 10 percent by weight to about 20 percent by weight of acetic acid, about 5 percent by weight to about 10 percent by weight of a nitrate, about 6 percent by weight to about 15 percent by weight of a sulfonic acid, about 1 percent by weight to about 5 percent by weight of an amine compound including a carboxyl group, about 0.1 percent by weight to about 1 percent by weight of a water-soluble amino acid, about 0.01 percent by weight to about 1 percent by weight of an azole compound, and water.

Abstract translation: 蚀刻剂组合物包括约25重量％至约35重量％的磷酸，约3重量％至约9重量％的硝酸，约10重量％至约20重量％的乙酸，约 5重量％至10重量％的硝酸盐，约6重量％至约15重量％的磺酸，约1重量％至约5重量％的包含羧基的胺化合物， 约0.1重量％至约1重量％的水溶性氨基酸，约0.01重量％至约1重量％的唑化合物和水。

公开(公告)号：US08552432B2

公开(公告)日：2013-10-08

申请号：US13715726

申请日：2012-12-14

Applicant: Samsung Display Co., Ltd.

Inventor： Wang-Woo Lee ,  Hong-Sick Park

IPC: H01L31/00

CPC classification number: H01L33/0041 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1292

Abstract: A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.