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公开(公告)号:US09524758B2
公开(公告)日:2016-12-20
申请号:US14875364
申请日:2015-10-05
申请人: SK hynix Inc.
发明人: Hyung-Sik Won
CPC分类号: G11C7/06 , G11C7/065 , G11C7/10 , G11C7/12 , G11C11/4091 , G11C2207/002 , G11C2207/005
摘要: A memory device may include a cell array including a plurality of memory cells and a bit line coupled to the plurality of memory cells; a sense amplifier suitable for amplifying a voltage difference between a first line and a second line; and a separation unit suitable for electrically coupling the bit line and the first line, and electrically separating the bit line and the first line during an initial period of an operation of the sense amplifier.
摘要翻译: 存储器装置可以包括包括多个存储器单元的单元阵列和耦合到多个存储单元的位线; 适于放大第一线和第二线之间的电压差的读出放大器; 以及适于电位耦合位线和第一线的分离单元,以及在读出放大器的操作的初始周期期间电位分隔位线和第一线。
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公开(公告)号:US20230094144A1
公开(公告)日:2023-03-30
申请号:US18060524
申请日:2022-11-30
申请人: SK hynix Inc.
发明人: Wan-Jun Roh , Hyun-Sup Kim , Hyung-Sik Won
IPC分类号: G06F11/30 , G11C5/14 , G11C11/406 , G11C11/4074 , G06F12/0877
摘要: A memory system may improve the endurance and performance of a plurality of memories included in the memory system mounted on a server system or a data processing system. For example, the memory system may throttle energy of a first memory using a second memory having a different characteristic from the first memory, control accesses to a memory region according to a refresh cycle, and control accesses to memories having different temperatures according to a priority of a request for each of the memories.
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公开(公告)号:US11544168B2
公开(公告)日:2023-01-03
申请号:US16858455
申请日:2020-04-24
申请人: SK hynix Inc.
发明人: Wan-Jun Roh , Hyung-Sup Kim , Hyung-Sik Won
IPC分类号: G06F11/30 , G11C5/14 , G11C11/406 , G11C11/4074 , G06F12/0877
摘要: A memory system may improve the endurance and performance of a plurality of memories included in the memory system mounted on a server system or a data processing system. For example, the memory system may throttle energy of a first memory using a second memory having a different characteristic from the first memory, control accesses to a memory region according to a refresh cycle, and control accesses to memories having different temperatures according to a priority of a request for each of the memories.
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公开(公告)号:US12020763B2
公开(公告)日:2024-06-25
申请号:US17735881
申请日:2022-05-03
申请人: SK hynix Inc.
发明人: Hyung-Sik Won , Hyungsup Kim
IPC分类号: G11C8/00 , G11C13/00 , G11C16/30 , G11C16/34 , G11C29/00 , G11C29/44 , G11C29/52 , G11C29/04
CPC分类号: G11C29/783 , G11C13/0097 , G11C16/30 , G11C16/349 , G11C29/44 , G11C29/52 , G11C29/76 , G11C29/785 , G11C29/835 , G11C2029/0411 , G11C2207/2236
摘要: A memory device includes: a memory cell array; a sense amplifier for amplifying data stored in the memory cell array; a first memory cell sub-array included in the memory cell array directly coupled to the sense amplifier; a switch coupled to the first memory cell sub-array; and a second memory cell sub-array included in the memory cell array coupled to the sense amplifier through the first memory cell sub-array and the switch. When the switch is enabled, the first memory cell sub-array has a first operation speed, and the second memory cell sub-array has a second operation speed slower than the first operation speed. When the switch is disabled, a bit line loading associated with the second memory cell sub-array is decreased, and the first memory cell sub-array has a third operation speed faster than the first operation speed.
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公开(公告)号:US10998082B2
公开(公告)日:2021-05-04
申请号:US16568111
申请日:2019-09-11
申请人: SK hynix Inc.
发明人: Hyung-Sik Won , Hyungsup Kim
IPC分类号: G11C16/06 , G11C29/00 , G11C29/44 , G11C16/34 , G11C13/00 , G11C16/30 , G11C29/52 , G11C29/04
摘要: A memory system includes a memory device and a controller. The memory device includes a memory cell array including a normal memory cell area and a redundancy memory cell area, the redundancy memory cell area having a replacement memory cell region and a reserved memory cell region; a register suitable for generating a first signal indicating existence of the reserved memory cell region; and a fuse unit suitable for activating the reserved memory cell region based on the first signal. The controller assigns an address for accessing a reserved memory cell of the reserved memory cell region based on the first signal. A replacement memory cell in the replacement memory cell region replaces a failed memory cell in the normal memory cell region, and the reserved memory cell in the reserved memory cell region remains without replacing any failed memory cell in the normal memory cell region.
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公开(公告)号:US10691625B2
公开(公告)日:2020-06-23
申请号:US16136069
申请日:2018-09-19
申请人: SK hynix Inc.
发明人: Hyung-Sup Kim , Hyung-Sik Won
IPC分类号: G11C7/10 , G11C7/04 , G06F13/16 , G06F12/0866 , G06F12/0893
摘要: A converged memory device includes: a first memory installed in an environment having a first temperature; a second memory installed in an environment having a second temperature that is lower than the first temperature; and a controller configured to selectively access the first memory or the second memory in response to a request.
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公开(公告)号:US10453550B2
公开(公告)日:2019-10-22
申请号:US16044322
申请日:2018-07-24
申请人: SK hynix Inc.
发明人: Hyung-Sik Won , Hyungsup Kim
摘要: A memory system includes a memory device and a controller. The memory device includes a memory cell array including a normal memory cell area and a redundancy memory cell area, the redundancy memory cell area having a replacement memory cell region and a reserved memory cell region; a register suitable for generating a first signal indicating existence of the reserved memory cell region; and a fuse unit suitable for activating the reserved memory cell region based on the first signal. The controller assigns an address for accessing a reserved memory cell of the reserved memory cell region based on the first signal. A replacement memory cell in the replacement memory cell region replaces a failed memory cell in the normal memory cell region, and the reserved memory cell in the reserved memory cell region remains without replacing any failed memory cell in the normal memory cell region.
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公开(公告)号:US09923627B2
公开(公告)日:2018-03-20
申请号:US14930302
申请日:2015-11-02
申请人: SK hynix Inc.
发明人: Hyung-Sik Won
CPC分类号: H04B7/24
摘要: A semiconductor device may include: a conversion value generator suitable for detecting first and second transition factors that are independent of each other, and generating first and second conversion values corresponding to the first and second transition factors, respectively; and a signal converter suitable for generating an output signal by reflecting the first and second conversion values into an input signal.
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公开(公告)号:US09847118B1
公开(公告)日:2017-12-19
申请号:US15386082
申请日:2016-12-21
申请人: SK hynix Inc.
发明人: Hyung-Sik Won
IPC分类号: G11C8/10 , G11C11/406
CPC分类号: G11C11/406 , G11C11/40622 , G11C11/4076
摘要: A memory device may include: a cell array comprising a main area and an adjacent area with a plurality of main memory cells disposed in the main area and a plurality of adjacent memory cells disposed in the adjacent area; a control circuit suitable for controlling a row operation and column operation of the cell array; and an adjacent area controller suitable for controlling adjacent memory cells so that the adjacent memory cells are operated under a different condition from the main memory cells.
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公开(公告)号:US09455003B2
公开(公告)日:2016-09-27
申请号:US14308449
申请日:2014-06-18
申请人: SK hynix Inc.
发明人: Hyung-Sik Won
CPC分类号: G11C7/12 , G11C7/1048 , G11C7/1096
摘要: A driver includes a driving block suitable for driving a data transferred through a first signal line to a second signal line, a first precharge unit suitable for precharging the second signal line with a first driving power during a first precharge operation; and a second precharge unit suitable for precharging the second signal line with a second driving power which is different from the first driving power during a second precharge operation performed subsequent to the first precharge operation.
摘要翻译: 驱动器包括适于驱动通过第一信号线传送到第二信号线的数据的驱动块,第一预充电单元,适于在第一预充电操作期间以第一驱动功率对第二信号线进行预充电; 以及第二预充电单元,其适于在所述第一预充电操作之后执行的第二预充电操作期间以与所述第一驱动功率不同的第二驱动功率对所述第二信号线进行预充电。
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