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公开(公告)号：US20220131067A1
公开(公告)日：2022-04-28
申请号：US17081557
申请日：2020-10-27
发明人： Alan KALITSOV , Bhagwati PRASAD , Derek STEWART
摘要： A magnetoresistive memory device includes a magnetic tunnel junction including a free layer, at least two tunneling dielectric barrier layers, and at least one metallic quantum well layer. The quantum well layer leads to the resonant electron tunneling through the magnetic tunnel junction in such a way that it strongly enhances the tunneling probability for one of the magnetization states of the free layer, while this tunneling probability remains much smaller in the opposite magnetization state of the free layer. The device can be configured in a spin transfer torque device configuration, a voltage-controlled magnetic anisotropy, a voltage controlled exchange coupling device configuration, or a spin-orbit-torque device configuration.
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2.发明公开公开(公告)号：US20230307027A1
公开(公告)日：2023-09-28
申请号：US17656306
申请日：2022-03-24
发明人： Alan KALITSOV , Derek STEWART , Ananth KAUSHIK , Gerardo BERTERO
CPC分类号： G11C11/161 , H01L43/08 , G11C11/1673 , G11C11/1675 , H01L43/02 , H01L43/10 , H01F10/3286 , G01R33/093 , H01L27/222
摘要： A magnetoresistive memory cell includes a magnetoresistive layer stack containing a reference layer, a nonmagnetic spacer layer, and a free layer. A ferroelectric material layer having two stable ferroelectric states is coupled to a strain-modulated ferromagnetic layer to alter a sign of magnetic exchange coupling between the strain-modulated ferromagnetic layer and the free layer. The strain-modulated ferromagnetic layer may be the reference layer or a perpendicular magnetic anisotropy layer that is located proximate to the ferroelectric material layer. The magnetoresistive memory cell may be configured as a three-terminal device or as a two-terminal device, and may be configured as a tunneling magnetoresistance (TMR) device or as a giant magnetoresistance (GMR) device.
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3.发明申请公开(公告)号：US20200233047A1
公开(公告)日：2020-07-23
申请号：US16250403
申请日：2019-01-17
发明人： Alan KALITSOV , Derek STEWART , Gerardo BERTERO
摘要： A magnetoresistive memory device includes a magnetic-exchange-coupled layer stack containing a free layer, a reference layer and an electrically conductive, non-magnetic interlayer exchange coupling layer located between the free layer and the reference layer, and an insulating spacer layer located in a series connection with the magnetic-exchange-coupled layer stack between a first electrode and a second electrode. The first electrode and the second electrode are configured to provide a programming voltage across the magnetic-exchange-coupled layer stack and the insulating spacer layer.
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公开(公告)号：US20220131068A1
公开(公告)日：2022-04-28
申请号：US17081625
申请日：2020-10-27
发明人： Alan KALITSOV , Bhagwati PRASAD , Derek STEWART
IPC分类号： H01L43/02 , H01L27/22 , H01L43/04 , H01L43/06 , H01L43/10 , H01L43/12 , H01L43/14 , G11C11/16 , G11C11/18
摘要： A magnetoresistive memory device includes a magnetic tunnel junction including a free layer, at least two tunneling dielectric barrier layers, and at least one metallic quantum well layer. The quantum well layer leads to the resonant electron tunneling through the magnetic tunnel junction in such a way that it strongly enhances the tunneling probability for one of the magnetization states of the free layer, while this tunneling probability remains much smaller in the opposite magnetization state of the free layer. The device can be configured in a spin transfer torque device configuration, a voltage-controlled magnetic anisotropy, a voltage controlled exchange coupling device configuration, or a spin-orbit-torque device configuration.
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5.发明公开公开(公告)号：US20230307029A1
公开(公告)日：2023-09-28
申请号：US18048121
申请日：2022-10-20
发明人： Alan KALITSOV , Derek STEWART , Bhagwati PRASAD
CPC分类号： G11C11/161 , H01L27/222 , H01L43/02 , H01L43/10 , G11C11/1673 , G11C11/1675
摘要： A magnetoresistive memory cell includes a first terminal electrode, a second terminal electrode, and a magnetoresistive layer stack located between the first terminal electrode and the second terminal electrode and including, from one side to another, a reference layer, a dielectric tunnel barrier layer, a free layer, and a material layer having two different states of lattice deformation which have different average in-plane lattice constants and which are configured to apply different in-plane stress. The material layer may be a metal-insulator transition (MIT) material layer that exhibits a phase transition between an insulator state and a metal state.
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6.发明公开公开(公告)号：US20230307028A1
公开(公告)日：2023-09-28
申请号：US17656310
申请日：2022-03-24
发明人： Alan KALITSOV , Derek STEWART , Ananth KAUSHIK , Gerardo BERTERO
CPC分类号： G11C11/161 , H01F10/3286 , G11C11/1675 , G11C11/1673 , H01L43/08 , H01L43/10 , H01L43/02 , H01L27/222 , G01R33/093
摘要： A magnetoresistive memory cell includes a magnetoresistive layer stack containing a reference layer, a nonmagnetic spacer layer, and a free layer. A ferroelectric material layer having two stable ferroelectric states is coupled to a strain-modulated ferromagnetic layer to alter a sign of magnetic exchange coupling between the strain-modulated ferromagnetic layer and the free layer. The strain-modulated ferromagnetic layer may be the reference layer or a perpendicular magnetic anisotropy layer that is located proximate to the ferroelectric material layer. The magnetoresistive memory cell may be configured as a three-terminal device or as a two-terminal device, and may be configured as a tunneling magnetoresistance (TMR) device or as a giant magnetoresistance (GMR) device.
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公开(公告)号：US20220130442A1
公开(公告)日：2022-04-28
申请号：US17081678
申请日：2020-10-27
发明人： Alan KALITSOV , Bhagwati PRASAD , Derek STEWART
摘要： A magnetoresistive memory device includes a magnetic tunnel junction including a free layer, at least two tunneling dielectric barrier layers, and at least one metallic quantum well layer. The quantum well layer leads to the resonant electron tunneling through the magnetic tunnel junction in such a way that it strongly enhances the tunneling probability for one of the magnetization states of the free layer, while this tunneling probability remains much smaller in the opposite magnetization state of the free layer. The device can be configured in a spin transfer torque device configuration, a voltage-controlled magnetic anisotropy, a voltage controlled exchange coupling device configuration, or a spin-orbit-torque device configuration.
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公开(公告)号：US20180212147A1
公开(公告)日：2018-07-26
申请号：US15637357
申请日：2017-06-29
发明人： Ricardo RUIZ , Jeffrey LILLE , Mac D. APODACA , Derek STEWART , Lei WAN , Bruce TERRIS
IPC分类号： H01L45/00
CPC分类号： H01L45/1641 , H01L27/249 , H01L45/06 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/14 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/1608
摘要： Resistive memory cells containing nanoparticles are formed between two electrodes. The nanoparticles may be embedded in a matrix or sintered together without a matrix. The memory cells may be projected memory cells or barrier modulated cells. Polymeric ligands may be used to deposit the nanoparticles over a substrate, followed by an optional removal or replacement of the polymeric ligands.
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