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公开(公告)号：US20160126292A1
公开(公告)日：2016-05-05
申请号：US14529624
申请日：2014-10-31
Applicant: SANDISK 3D LLC
Inventor： Naohito Yanagida , Cheng Feng , Michiaki Sano , Akira Nakada , Steven J. Radigan , Eiji Hayashi
CPC classification number: H01L45/141 , H01L27/249 , H01L45/04 , H01L45/06 , H01L45/1226 , H01L45/1273 , H01L45/145 , H01L45/1616
Abstract: An alternating stack of electrically conductive layers and electrically insulating layers is formed over global bit lines formed on a substrate. The alternating stack is patterned to form a line stack of electrically conductive lines and electrically insulating lines. Trench isolation structures are formed within each trench to define a plurality of memory openings laterally spaced from one another by the line stack in one direction and by trench isolation structures in another direction. The electrically conductive lines are laterally recessed relative to sidewall surfaces of the electrically insulating lines. A read/write memory material is deposited in recesses, and is anisotropically etched so that a top surface of a global bit line is physically exposed at a bottom of each memory opening. An electrically conductive bit line is formed within each memory opening to form a resistive random access memory device.
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公开(公告)号：US09666799B2
公开(公告)日：2017-05-30
申请号：US14529624
申请日：2014-10-31
Applicant: SANDISK 3D LLC
Inventor： Naohito Yanagida , Cheng Feng , Michiaki Sano , Akira Nakada , Steven J. Radigan , Eiji Hayashi
CPC classification number: H01L45/141 , H01L27/249 , H01L45/04 , H01L45/06 , H01L45/1226 , H01L45/1273 , H01L45/145 , H01L45/1616
Abstract: An alternating stack of electrically conductive layers and electrically insulating layers is formed over global bit lines formed on a substrate. The alternating stack is patterned to form a line stack of electrically conductive lines and electrically insulating lines. Trench isolation structures are formed within each trench to define a plurality of memory openings laterally spaced from one another by the line stack in one direction and by trench isolation structures in another direction. The electrically conductive lines are laterally recessed relative to sidewall surfaces of the electrically insulating lines. A read/write memory material is deposited in recesses, and is anisotropically etched so that a top surface of a global bit line is physically exposed at a bottom of each memory opening. An electrically conductive bit line is formed within each memory opening to form a resistive random access memory device.
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