Invention Grant
- Patent Title: Concave word line and convex interlayer dielectric for protecting a read/write layer
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Application No.: US14529624Application Date: 2014-10-31
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Publication No.: US09666799B2Publication Date: 2017-05-30
- Inventor: Naohito Yanagida , Cheng Feng , Michiaki Sano , Akira Nakada , Steven J. Radigan , Eiji Hayashi
- Applicant: SANDISK 3D LLC
- Applicant Address: US TX Plano
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Plano
- Agency: The Marbury Law Group PLLC
- Main IPC: H01L47/00
- IPC: H01L47/00 ; H01L45/00 ; H01L27/24

Abstract:
An alternating stack of electrically conductive layers and electrically insulating layers is formed over global bit lines formed on a substrate. The alternating stack is patterned to form a line stack of electrically conductive lines and electrically insulating lines. Trench isolation structures are formed within each trench to define a plurality of memory openings laterally spaced from one another by the line stack in one direction and by trench isolation structures in another direction. The electrically conductive lines are laterally recessed relative to sidewall surfaces of the electrically insulating lines. A read/write memory material is deposited in recesses, and is anisotropically etched so that a top surface of a global bit line is physically exposed at a bottom of each memory opening. An electrically conductive bit line is formed within each memory opening to form a resistive random access memory device.
Public/Granted literature
- US20160126292A1 CONCAVE WORD LINE AND CONVEX INTERLAYER DIELECTRIC FOR PROTECTING A READ/WRITE LAYER Public/Granted day:2016-05-05
Information query
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