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公开(公告)号：US20220059417A1
公开(公告)日：2022-02-24
申请号：US17520854
申请日：2021-11-08
发明人： Myeong-soon PARK , Hyun-Soo Chung , Chan-Ho Lee
摘要： A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.
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2.发明申请公开(公告)号：US20200013740A1
公开(公告)日：2020-01-09
申请号：US16283906
申请日：2019-02-25
发明人： JIN-KUK BAE , Hyun-Soo Chung , Han-Sung Ryu , In-Young Lee , Chan-Ho Lee
IPC分类号： H01L23/00
摘要： A semiconductor chip includes a substrate. An electrode pad is disposed on the substrate. The electrode pad includes a low-k material layer. A first protection layer at least partially surrounds the electrode pad. The first protection layer includes a first opening at an upper portion thereof. A buffer pad is electrically connected to the electrode pad. A second protection layer at least partially surrounds the buffer pad. The second protection layer includes a second opening at an upper portion thereof. A pillar layer and a solder layer are sequentially stacked on the buffer pad. A thickness of the buffer pad is greater than a thickness of the electrode pad. A width of the first opening in a first direction parallel to an upper surface of the semiconductor substrate is equal to or greater than a width of the second opening in the first direction.
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3.发明申请公开(公告)号：US20200266114A1
公开(公告)日：2020-08-20
申请号：US16868209
申请日：2020-05-06
发明人： Myeong-soon Park , Hyun-Soo Chung , Chan-Ho Lee
摘要： A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.
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4.发明授权公开(公告)号：US10930610B2
公开(公告)日：2021-02-23
申请号：US16283906
申请日：2019-02-25
发明人： Jin-Kuk Bae , Hyun-Soo Chung , Han-Sung Ryu , In-Young Lee , Chan-Ho Lee
摘要： A semiconductor chip includes a substrate having a low-k material layer. An electrode pad is disposed the substrate. A first protection layer at least partially surrounds the electrode pad. The first protection layer includes a first opening at an upper portion thereof. A buffer pad is electrically connected to the electrode pad. A second protection layer at least partially surrounds the buffer pad. The second protection layer includes a second opening at an upper portion thereof. A pillar layer and a solder layer are sequentially stacked on the buffer pad. A thickness of the buffer pad is greater than a thickness of the electrode pad. A width of the first opening in a first direction parallel to an upper surface of the semiconductor substrate is equal to or greater than a width of the second opening in the first direction.
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5.发明授权Inter connection structure including copper pad and pad barrier layer, semiconductor device and electronic apparatus including the same 有权包括铜焊盘和焊盘阻挡层的互连结构，半导体器件和包括其的电子设备公开(公告)号：US08735281B2
公开(公告)日：2014-05-27
申请号：US13875525
申请日：2013-05-02
发明人： Chang-Woo Shin , Hyun-Soo Chung , Eun-Chul Ahn , Jum-Gon Kim , Jin-Ho Chun
IPC分类号： H01L21/44 , H01L21/4763
CPC分类号： H01L21/76841 , H01L23/525 , H01L23/53238 , H01L24/02 , H01L24/13 , H01L2224/0231 , H01L2224/02331 , H01L2224/0235 , H01L2224/0401 , H01L2224/05599 , H01L2224/13099 , H01L2924/00014 , H01L2924/01005 , H01L2924/01015 , H01L2924/01022 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/04941 , H01L2924/12044
摘要： A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium disposed on the copper pad, an inorganic insulating layer disposed on the pad barrier layer, a buffer layer disposed on the inorganic insulating layer, wherein the inorganic insulating layer and the buffer layer expose a portion of the pad barrier layer, a seed metal layer disposed on the exposed buffer layer, a metal redistribution layer disposed on the seed metal layer, and a first protective layer disposed on the metal redistribution layer.
摘要翻译： 提供一种包括铜焊盘，焊盘阻挡层和金属再分布层的互连结构的半导体器件，其互连结构及其制造方法。 半导体器件包括设置在第一层上的铜焊盘，包括设置在铜焊盘上的钛的焊盘阻挡层，设置在焊盘阻挡层上的无机绝缘层，设置在无机绝缘层上的缓冲层，其中无机绝缘 所述缓冲层暴露所述焊盘阻挡层的一部分，设置在所述暴露的缓冲层上的种子金属层，设置在所述种子金属层上的金属再分配层以及设置在所述金属再分配层上的第一保护层。
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公开(公告)号：US11705376B2
公开(公告)日：2023-07-18
申请号：US17520854
申请日：2021-11-08
发明人： Myeong-soon Park , Hyun-Soo Chung , Chan-Ho Lee
CPC分类号： H01L22/32 , G11C29/1201 , H01L2224/16145 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H01L2224/48091 , H01L2924/00014 , H01L2924/181 , H01L2924/00012
摘要： A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.
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公开(公告)号：US11189535B2
公开(公告)日：2021-11-30
申请号：US16868209
申请日：2020-05-06
发明人： Myeong-soon Park , Hyun-Soo Chung , Chan-Ho Lee
摘要： A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.
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8.发明申请公开(公告)号：US20130313722A1
公开(公告)日：2013-11-28
申请号：US13763294
申请日：2013-02-08
发明人： Son-Kwan Hwang , Byung-Lyul Park , Hyun-Soo Chung , Jin-Ho Chun , Gil-Heyun Choi
IPC分类号： H01L23/498
CPC分类号： H01L23/49827 , H01L23/481 , H01L23/49822 , H01L23/49838 , H01L2924/0002 , H05K2201/09563 , H01L2924/00
摘要： A semiconductor device includes an insulating layer on a surface of a substrate, a through-via structure vertically passing through the substrate and the insulating layer and being exposed on the insulating layer, and a via pad on a surface of the exposed through-via structure. The via pad includes a via pad body, and a via pad inlay below the via pad body and protruding into the insulating layer and surrounding the through-via structure. The via pad body and the via pad inlay include a via pad barrier layer directly on the insulating layer and a via pad metal layer on the via pad barrier layer.
摘要翻译： 半导体器件包括在衬底的表面上的绝缘层，垂直穿过衬底和绝缘层并且暴露在绝缘层上的通孔结构，以及暴露的通孔结构的表面上的通孔焊盘 。 通孔焊盘包括通孔焊盘主体和通孔焊盘嵌入到通孔焊盘主体下方并突出到绝缘层中并且围绕通孔结构。 通孔焊盘主体和通孔焊盘嵌体包括直接在绝缘层上的通孔焊盘阻挡层和通孔焊盘阻挡层上的通孔焊盘金属层。
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