公开(公告)号：US20160154733A1

公开(公告)日：2016-06-02

申请号：US14956065

申请日：2015-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUN-YOUNG LIM ,  CHUL-UNG KIM ,  JONG-HYUN CHOI

IPC: G06F12/02 ,  G11C29/52 ,  G06F11/10 ,  G06F12/14 ,  G06F12/06

CPC classification number: G06F12/0246 ,  G06F11/1048 ,  G06F2212/7201 ,  G11C29/42 ,  G11C29/44 ,  G11C29/4401 ,  G11C29/76 ,  G11C2029/0409 ,  G11C2029/4402

Abstract: In a method of operating a solid state drive including a non-volatile memory, a volatile memory and a controller, the controller reads fail information of the volatile memory from a fail information region included in the non-volatile memory. The controller maps a logical address of data to a physical address of the volatile memory based on a bad address list and a clean address list that are generated based on the fail information. The controller loads the data into the volatile memory according to the address mapping. The method of operating a solid state drive may block access to fail addresses corresponding to failed cells included in the solid state drive by sequentially mapping logical addresses to physical addresses of a volatile memory included in the solid state drive based on a clean address list and a bad address list that are generated based on a fail information.

Abstract translation: 在操作包括非易失性存储器，易失性存储器和控制器的固态驱动器的方法中，控制器从包括在非易失性存储器中的故障信息区域读取易失性存储器的故障信息。 控制器基于基于故障信息生成的不良地址列表和干净地址列表，将数据的逻辑地址映射到易失性存储器的物理地址。 控制器根据地址映射将数据加载到易失性存储器中。 操作固态驱动器的方法可以通过基于干净的地址列表和固定状态驱动器将逻辑地址顺序地映射到包括在固态驱动器中的易失性存储器的物理地址来阻止对包括在固态驱动器中的故障单元的对应的故障地址的访问 基于失败信息生成的不良地址列表。

公开(公告)号：US20150199201A1

公开(公告)日：2015-07-16

申请号：US14524231

申请日：2014-10-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUN-YOUNG LIM ,  MIN-YEAB CHOO ,  MI-KYOUNG PARK ,  DONG-YANG LEE ,  BU-IL JUNG ,  JU-YUN JUNG ,  HYUK HAN

IPC: G06F9/44

CPC classification number: G06F11/0793 ,  G06F9/445 ,  G06F11/073 ,  G06F11/1004 ,  G06F11/1417

Abstract: In a method of operating a memory system including a memory device, a memory controller and a host according to example embodiments, a hardware is initialized based on a fail information and a boot code stored in a nonvolatile memory of a volatile memory and the nonvolatile memory included in the memory device. A host processes data in an internal memory included in the memory controller and a safe region included in the memory device based on the fail information. Using the fail information, the method of operating the memory system according to example embodiments increases the performance of the whole system including the memory system.

Abstract translation: 在根据示例实施例的操作包括存储器设备，存储器控制器和主机的存储器系统的方法中，基于存储在易失性存储器和非易失性存储器的非易失性存储器中的故障信息和引导代码来初始化硬件 包含在存储设备中。 主机根据故障信息处理包含在存储器控制器中的内部存储器中的数据和包括在存储器件中的安全区域。 使用失败信息，根据示例性实施例的操作存储器系统的方法增加了包括存储器系统的整个系统的性能。

公开(公告)号：US20150261616A1

公开(公告)日：2015-09-17

申请号：US14637955

申请日：2015-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUN-YOUNG LIM ,  SUNG-YONG SEO ,  YOUNG-JIN CHO ,  JU-YUN JUNG

IPC: G06F11/14 ,  G06F13/28 ,  G06F12/12 ,  G06F12/10

CPC classification number: G06F11/1446 ,  G06F12/08 ,  G06F12/1009 ,  G06F12/121 ,  G06F13/28 ,  G06F2212/655

Abstract: A memory swap operation comprises writing information about a process in which a page fault occurred, into a temporary memory using a processor of a host, copying a page in which the page fault occurred, from a memory device recognized as a swap memory into a main memory of the host, and after completing the copying of the page, resuming the process in which the page fault occurred, using the information about the process, written in the temporary memory.

Abstract translation: 存储器交换操作包括使用主机的处理器将发生页错误的处理的信息写入临时存储器，将发生页错误的页面从识别为交换存储器的存储器设备复制到主 主机的内存，在完成页面的复制之后，使用写在临时存储器中的关于进程的信息来恢复出现页面错误的过程。

公开(公告)号：US20140013066A1

公开(公告)日：2014-01-09

申请号：US13932352

申请日：2013-07-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUN-YOUNG LIM ,  Dong-Hwi Kim

IPC: G06F12/00

CPC classification number: G06F12/00 ,  G06F3/0602 ,  G06F3/0604 ,  G06F12/0238 ,  G06F13/1684 ,  G06F13/382 ,  Y02D10/14 ,  Y02D10/151

Abstract: A memory sub-system includes a main memory, a storage device, a control unit, and a common interface unit. The control unit is configured to control the main memory and the storage device. The common interface unit is operatively coupled to the control unit, and is configured to access the main memory and the storage device through the control unit in response to a request received from a host.

Abstract translation: 存储器子系统包括主存储器，存储装置，控制单元和公共接口单元。 控制单元被配置为控制主存储器和存储设备。 公共接口单元可操作地耦合到控制单元，并且被配置为响应于从主机接收到的请求，通过控制单元访问主存储器和存储设备。

公开(公告)号：US20160004655A1

公开(公告)日：2016-01-07

申请号：US14791282

申请日：2015-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNG-KWANG YOO ,  JIN-HYEOK CHOI ,  SUN-YOUNG LIM ,  YOUNG-JIN CHO

IPC: G06F13/32 ,  G06F12/10 ,  G06F13/42 ,  G06F12/06

CPC classification number: G06F13/32 ,  G06F12/0638 ,  G06F12/1081 ,  G06F13/28 ,  G06F13/4282 ,  G06F2212/1012 ,  G06F2212/205 ,  G06F2212/2532

Abstract: A computing system includes a first unified module including a first storage device and a second storage device that are different from each other, and a unified module interface configured to provide a direct memory access (DMA) request signal to control a first DMA with respect to the first storage device and to perform a second DMA on the second storage device. An application processor is configured to receive the DMA request signal from the unified module interface, and provide a DMA request response signal to the unified module interface and control the second DMA with respect to the second storage device.

Abstract translation: 计算系统包括第一统一模块，其包括彼此不同的第一存储设备和第二存储设备;以及统一模块接口，被配置为提供直接存储器访问（DMA）请求信号，以相对于 第一存储设备并且在第二存储设备上执行第二DMA。 应用处理器被配置为从统一模块接口接收DMA请求信号，并向统一模块接口提供DMA请求响应信号，并相对于第二存储设备控制第二DMA。

公开(公告)号：US20140189183A1

公开(公告)日：2014-07-03

申请号：US14090521

申请日：2013-11-26

Applicant: Samsung Electronics Co., Ltd

Inventor： SUN-YOUNG LIM ,  DONG-HWI KIM

IPC: G06F13/24

CPC classification number: G06F13/24 ,  G06F13/1694

Abstract: A memory system includes first and second memory devices, a memory controller configured to control the second memory device, to store a request signal to access the first memory device, and to generate an interrupt signal, and a host configured to receive the request signal in response to the interrupt signal.

Abstract translation: 存储器系统包括第一和第二存储器设备，配置成控制第二存储器件的存储器控​​制器，存储访问第一存储器件的请求信号，并产生中断信号，以及被配置为接收请求信号的主机 响应中断信号。