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    SEMICONDUCTOR PACKAGE
    2.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20240030119A1

    公开(公告)日：2024-01-25

    申请号：US18374396

    申请日：2023-09-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： DONGKYU KIM ,  SEOKHYUN LEE ,  KYOUNG LIM SUK ,  JAEGWON JANG ,  GWANGJAE JEON

    IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065

    CPC classification number: H01L23/49822 ,  H01L24/32 ,  H01L24/16 ,  H01L23/49833 ,  H01L25/0657 ,  H01L23/49894 ,  H01L2224/16227 ,  H01L2224/32225

    Abstract: A semiconductor package may include a redistribution substrate, a connection terminal, and a semiconductor chip sequentially stacked. The redistribution substrate may include an insulating layer, a plurality of redistribution patterns, which are vertically stacked in the insulating layer, and each of which includes interconnection and via portions, and a bonding pad on the interconnection portion of the topmost redistribution pattern. The topmost redistribution pattern and the bonding pad may include different metallic materials. The bonding pad may have first and second surfaces opposite to each other. The first surface of the bonding pad may be in contact with a top surface of the interconnection portion of the topmost redistribution pattern. A portion of the second surface of the bonding pad may be in contact with the connection terminal. The insulating layer may be extended to be in contact with the remaining portion of the second surface.

    SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
    4.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20200083201A1

    公开(公告)日：2020-03-12

    申请号：US16430426

    申请日：2019-06-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： KYOUNG LIM SUK ,  SEOKHYUN LEE

    IPC: H01L25/10 ,  H01L23/522 ,  H01L23/528 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

    Abstract: A method of fabricating a semiconductor package includes providing a semiconductor chip, forming a redistribution substrate, and fabricating a package including the semiconductor chip disposed on the redistribution substrate. The forming of the redistribution substrate may include forming a first insulating layer on a substrate, the first insulating layer having a first opening formed therein, forming an integrally formed first redistribution pattern in the first opening and on the first insulating layer, forming a second insulating layer on the first insulating layer to cover the first redistribution pattern, and performing a planarization process on the second insulating layer to expose the first redistribution pattern.

    SEMICONDUCTOR PACKAGE
    5.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20240071866A1

    公开(公告)日：2024-02-29

    申请号：US18237209

    申请日：2023-08-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： CHEOL KIM ,  SEOKHYUN LEE

    IPC: H01L23/433 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10

    CPC classification number: H01L23/4334 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/24 ,  H01L25/105 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/2101 ,  H01L2224/32225 ,  H01L2224/73204

    Abstract: A semiconductor package includes a package substrate, a first semiconductor chip, and an encapsulant surrounding the semiconductor chip. The first semiconductor chip includes a semiconductor substrate having an active surface and an inactive surface opposite to the active surface, the semiconductor chip disposed on the package substrate such that the active surface faces the package substrate. The semiconductor package further includes a first redistribution structure on the encapsulant. The first redistribution structure includes a thermally conductive pattern, a heat-conducting through via providing a path for heat to conduct from the semiconductor substrate to the thermally conductive pattern, and a redistribution insulating layer surrounding the heat-conducting through via. The semiconductor substrate includes a first contact region having a higher temperature than a surrounding area on the inactive surface, and the heat-conducting through via passes through the encapsulant and contacts the first contact region.

    SEMICONDUCTOR PACKAGE
    7.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20230065378A1

    公开(公告)日：2023-03-02

    申请号：US17680857

    申请日：2022-02-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： MINJUNG KIM ,  DONGKYU KIM ,  JONGYOUN KIM ,  SEOKHYUN LEE

    IPC: H01L25/065 ,  H01L23/00 ,  H01L23/48 ,  H01L23/498

    Abstract: A semiconductor package includes a first redistribution substrate, a lower semiconductor chip on the first redistribution substrate and a through via therein, a first lower conductive structure and a second lower conductive structure that are on the first redistribution substrate and are laterally spaced apart from the lower semiconductor chip, an upper semiconductor chip on the lower semiconductor chip and the second lower conductive structure and coupled to the through via and the second lower conductive structure, and an upper conductive structure on the first lower conductive structure. A width of the second lower conductive structure is greater than a width of the through via.

    SEMICONDUCTOR PACKAGE
    9.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20230101149A1

    公开(公告)日：2023-03-30

    申请号：US17843967

    申请日：2022-06-18

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： TAEWON YOO ,  JONGYOUN KIM ,  KYOUNG LIM SUK ,  SEOKHYUN LEE ,  HYEONJEONG HWANG

    IPC: H01L23/367 ,  H01L25/10 ,  H01L23/31 ,  H01L25/18

    Abstract: A semiconductor package is disclosed. The semiconductor package may include a first redistribution substrate including a first insulating layer and a first redistribution pattern, a lower semiconductor chip mounted on the first redistribution substrate, a conductive structure disposed on the first redistribution substrate and horizontally spaced apart from the lower semiconductor chip, a first mold layer interposed between the first redistribution substrate and the second redistribution substrate to cover the lower semiconductor chip and the conductive structure, a second redistribution substrate on the first redistribution substrate, the second redistribution substrate including a second insulating layer and a second redistribution pattern, a first heat-dissipation pattern interposed between the lower semiconductor chip and the second insulating layer, and a heat-dissipation pad on the conductive structure. A top surface of the first heat-dissipation pattern may be located at a level higher than a top surface of the conductive structure.

    SEMICONDUCTOR PACKAGE
    10.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20230058497A1

    公开(公告)日：2023-02-23

    申请号：US17852542

    申请日：2022-06-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： KYOUNG LIM SUK ,  BANGWEON LEE ,  SEOKHYUN LEE

    IPC: H01L23/48 ,  H01L25/10 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31

    Abstract: A semiconductor package includes a package substrate, a first semiconductor chip mounted on the package substrate, a first molding layer on the package substrate and surrounding the first semiconductor chip, a redistribution layer on the first molding layer, a first through via that vertically penetrates the first molding layer and connects the package substrate to the redistribution layer, a second semiconductor chip mounted on the redistribution layer, a second molding layer on the redistribution layer and surrounding the second semiconductor chip, and a second through via that vertically penetrates the second molding layer and is connected to the redistribution layer. A first width of the first through via is less than a second width of the second through via. The second through via is electrically floated from a signal circuit of the second semiconductor chip.

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