知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

8 records (took 0.014 seconds)

    SEMICONDUCTOR PACKAGE
    1.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20210265251A1

    公开(公告)日：2021-08-26

    申请号：US17031141

    申请日：2020-09-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyungdon MUN ,  Myungsam KANG ,  Youngchan KO ,  Yieok KWON ,  Jeongseok KIM ,  Gongje LEE ,  Bongju CHO

    IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

    Abstract: A semiconductor package includes a core member having a first surface and a second surface opposing each other, and an external side surface between the first and second surfaces, the core member having a through-hole connecting the first and second surfaces, having a protruding portion that protrudes from the external side surface, and having a surface roughness (Ra) of 0.5 μm or more, a redistribution substrate on the first surface of the core member, and including a redistribution layer; a semiconductor chip in the through-hole on the redistribution substrate, and having a contact pad electrically connected to the redistribution layer, and an encapsulant on the redistribution substrate, and covering the semiconductor chip and the core member, the protruding portion of the core member having a surface exposed to a side surface of the encapsulant.

    SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATION STRUCTURE
    4.
    发明申请
    SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATION STRUCTURE 有权

    公开(公告)号：US20230038413A1

    公开(公告)日：2023-02-09

    申请号：US17702440

    申请日：2022-03-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Myungsam KANG ,  Jeongseok KIM ,  Bongju CHO

    IPC: H01L23/34 ,  H01L23/00 ,  H01L25/16 ,  H01L23/31 ,  H01L23/498

    Abstract: A semiconductor package includes a first rewiring layer; a lower semiconductor chip on the first rewiring layer; an upper semiconductor chip on the lower semiconductor chip; a heat dissipation structure on the upper semiconductor chip; a molding layer on the first rewiring layer so as to contact side surfaces of the lower semiconductor chip, the upper semiconductor chip, and the heat dissipation structure; a second rewiring layer on the heat dissipation structure; and one or more connection structures on the first rewiring layer and positioned adjacent to the side surfaces of the lower semiconductor chip and the upper semiconductor chip and configured to extend through the molding layer and connect the first rewiring layer to the second rewiring layer, wherein the upper semiconductor chip and the heat dissipation structure contact each other.

    FAN-OUT TYPE SEMICONDUCTOR PACKAGE
    5.
    发明申请
    FAN-OUT TYPE SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220068784A1

    公开(公告)日：2022-03-03

    申请号：US17218356

    申请日：2021-03-31

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Myungsam KANG ,  Youngchan KO ,  Jeongseok KIM ,  Bongju CHO

    IPC: H01L23/498 ,  H01L23/552 ,  H01L25/10

    Abstract: A fan-out type semiconductor package includes: a frame including a cavity and a middle redistribution layer (RDL) structure at least partially surrounding the cavity; a semiconductor chip in the cavity; a lower RDL structure on the frame and electrically connected with the semiconductor chip and the middle RDL structure; an upper RDL structure on the frame and electrically connected with the middle RDL structure; an upper shielding pattern in the upper RDL structure to shield the semiconductor chip from electromagnetic interference (EMI); a lower shielding pattern in the lower RDL structure to shield the semiconductor chip from the EMI; and a side shielding pattern in the middle RDL structure to shield the semiconductor chip from the EMI. The upper shielding pattern and the lower shielding pattern have a thickness of no less than about 5 μm, and the side shielding pattern has a width of no less than about 5 μm.

    SEMICONDUCTOR PACKAGE
    6.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220059440A1

    公开(公告)日：2022-02-24

    申请号：US17228784

    申请日：2021-04-13

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Myungsam KANG ,  Youngchan KO ,  Jeongseok KIM ,  Kyung Don MUN ,  Bongju CHO

    IPC: H01L23/498 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00

    Abstract: A semiconductor package includes a redistribution substrate having a dielectric layer and a wiring pattern in the dielectric layer, the wiring pattern including a line part that extends horizontally, and a via part connected to the line part, the via part having a width less than a width of the line part, a passivation layer on a top surface of the redistribution substrate, the passivation layer including a material different from a material of the dielectric layer, a conductive pillar that penetrates the passivation layer, the conductive pillar being connected to the via part, and a connection terminal on a top surface of the conductive pillar, a distance between the top surface of the conductive pillar and a top surface of the passivation layer being greater than a thickness of the passivation layer.

    SEMICONDUCTOR PACKAGE
    7.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220013454A1

    公开(公告)日：2022-01-13

    申请号：US17149216

    申请日：2021-01-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Myungsam KANG ,  Youngchan KO ,  Jeongseok KIM ,  Bongju CHO

    IPC: H01L23/522 ,  H01L23/00 ,  H01L23/528 ,  H01L23/532

    Abstract: A semiconductor package includes: a first redistribution structure having a first surface and a second surface opposing the first surface, and including a first insulating layer and a first redistribution layer disposed on the first insulating layer; a semiconductor chip disposed on the first surface of the first redistribution structure, and including a connection pad electrically connected to the first redistribution layer and embedded in the first insulating layer; a vertical connection structure disposed on the first surface and electrically connected to the first redistribution layer; an encapsulant encapsulating at least a portion of each of the semiconductor chip and the vertical connection structure; a second redistribution structure disposed on the encapsulant and including a second redistribution layer electrically connected to the vertical connection structure; and a connection bump disposed on the second surface and electrically connected to the first redistribution layer.

    SEMICONDUCTOR PACKAGE
    8.
    发明申请
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20200312797A1

    公开(公告)日：2020-10-01

    申请号：US16703279

    申请日：2019-12-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Myungsam KANG ,  Changbae LEE ,  Bongju CHO ,  Younggwan KO ,  Yongkoon LEE ,  Moonil KIM ,  Youngchan KO

    IPC: H01L23/66 ,  H01L23/31 ,  H01L23/498 ,  H01L23/522 ,  H01L23/00

    Abstract: A semiconductor package includes: a connection structure including one or more redistribution layers; a core structure disposed on a surface of the connection structure; a semiconductor chip disposed on the surface and including connection pads electrically connected to the redistribution layers of the connection structure; a first encapsulant disposed on the surface and covering at least a portion of each of the core structure and the semiconductor chip; an antenna substrate disposed on the first encapsulant and including one or more wiring layers, at least a portion of the wiring layers including an antenna pattern; and a through via penetrating at least a portion of each of the connection structure, the core structure, the first encapsulant, and the antenna substrate.

Patent Agency Ranking