公开(公告)号：US20160315027A1

公开(公告)日：2016-10-27

申请号：US15003473

申请日：2016-01-21

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Jong In RYU ,  Ki Joo SIM ,  Do Jae YOO ,  Ki Ju LEE ,  Jin Su KIM

IPC: H01L23/31 ,  H01L23/29 ,  H01L21/56 ,  H01L21/768 ,  H01L23/538 ,  H01L21/268

CPC classification number: H01L23/3121 ,  H01L21/4846 ,  H01L21/565 ,  H01L23/16 ,  H01L23/293 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/562 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106

Abstract: A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.

Abstract translation: 半导体封装及其制造方法包括安装在基板的上表面，下表面或两者上的芯片构件。 半导体封装及其制造方法还包括堆叠嵌入芯片部件的模具部件，设置在模具部件的中心部分的连接部件和形成在连接部件的一部分上的焊接部件。

公开(公告)号：US20160007463A1

公开(公告)日：2016-01-07

申请号：US14732550

申请日：2015-06-05

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Do Jae YOO ,  Jae Hyun LIM ,  Jong In RYU ,  Kyu Hwan OH ,  Ki Ju LEE

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/30 ,  H05K3/40 ,  H05K3/18 ,  H05K1/11 ,  H05K3/28

CPC classification number: H05K3/284 ,  H01L23/3121 ,  H01L25/00 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K3/28 ,  H05K3/4007 ,  H05K2203/0723 ,  H05K2203/1572 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: An electronic device module includes: a board including at least one mounting electrode and at least one external connection electrode and having a protective insulation layer which is provided on an outer surface thereof; at least one electronic device mounted on the mounting electrodes; a molded part sealing the electronic device; and at least one connective conductor of which one end is bonded to the external connection electrode of the board and which penetrates through the molded part to be disposed in the molded part, wherein the protective insulation layer is disposed to be spaced apart from the connective conductor.

Abstract translation: 电子设备模块包括：板，其包括至少一个安装电极和至少一个外部连接电极，并具有设置在其外表面上的保护绝缘层; 安装在所述安装电极上的至少一个电子装置; 密封电子设备的模制部件; 以及至少一个连接导体，其一端接合到所述基板的外部连接电极并且穿过所述模制部件以设置在所述模制部件中，其中所述保护绝缘层设置成与所述连接导体间隔开 。

公开(公告)号：US20190122991A1

公开(公告)日：2019-04-25

申请号：US15972820

申请日：2018-05-07

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Ki Ju LEE ,  Jin Su KIM

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package includes: a connection member having first and second surfaces opposing each other and including a redistribution layer; a support member disposed on the first surface of the connection member, including a cavity, and having an inner sidewall surrounding the cavity of which an upper region is chamfered; a semiconductor chip disposed on the connection member in the cavity and having connection pads electrically connected to the redistribution layer; at least one electronic component disposed between the semiconductor chip and the inner sidewall and having connection terminals electrically connected to the redistribution layer; and an encapsulant encapsulating the semiconductor chip and the at least one electronic component disposed in the cavity.

公开(公告)号：US20170033039A1

公开(公告)日：2017-02-02

申请号：US15074376

申请日：2016-03-18

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Ki Ju LEE ,  Jun Woo MYUNG ,  No Il PARK ,  Jin Su KIM ,  Eung Suek LEE ,  Jae Hyun LIM

IPC: H01L23/498 ,  H01L25/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16227 ,  H01L2225/06524 ,  H01L2225/06572 ,  H01L2924/1531 ,  H01L2924/1532 ,  H01L2924/1533 ,  H01L2924/19106

Abstract: A semiconductor package includes a first substrate, a pattern layer disposed on the first substrate, a first chip member disposed on a surface of the first substrate, lead frames mounted on the first substrate surrounding the first chip member, and a first encapsulation layer disposed on the first substrate, encapsulating the first chip member and the lead frame, wherein upper end portions of the lead frame and the first encapsulation layer are removed, and lead frame columns are exposed through the first encapsulation layer.

Abstract translation: 半导体封装包括第一衬底，设置在第一衬底上的图案层，设置在第一衬底的表面上的第一芯片构件，安装在围绕第一芯片构件的第一衬底上的引线框架和设置在第一衬底上的第一封装层 封装第一芯片构件和引线框架的第一衬底，其中引线框架和第一封装层的上端部分被去除，并且引线框架柱通过第一封装层露出。