公开(公告)号：US20190139876A1

公开(公告)日：2019-05-09

申请号：US15988541

申请日：2018-05-24

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jeong Il LEE ,  Jeong Ho LEE ,  Jin Su KIM ,  Bong Ju CHO

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/48

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; first metal bumps disposed on the connection pads; second metal bumps disposed on an uppermost wiring layer of the wiring layers; an encapsulant covering at least portions of each of the frame, the semiconductor chip, and the first and second metal bumps and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads and the uppermost wiring layer through the first and second metal bumps.

公开(公告)号：US20190131253A1

公开(公告)日：2019-05-02

申请号：US15978783

申请日：2018-05-14

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jeong Ho LEE ,  Myung Sam KANG ,  Young Gwan KO ,  Shang Hoon SEO ,  Jin Su KIM

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other. A lowermost wiring layer of the wiring layers is embedded in the frame and has a lower surface exposed from a lowermost insulating layer of the frame.

公开(公告)号：US20190019757A1

公开(公告)日：2019-01-17

申请号：US15819541

申请日：2017-11-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Ji Hyun LEE ,  Jin Gu KIM ,  Chang Bae LEE ,  Jin Su KIM

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/00

Abstract: A fan-out semiconductor package includes: a semiconductor chip; an encapsulant encapsulating at least portions of the semiconductor chip; and a first connection member disposed on the semiconductor chip and including a first redistribution layer electrically connected to the connection pads and a second redistribution layer electrically connected to the connection pads and disposed on the first redistribution layer. The first redistribution layer includes a first pattern having a plurality of degassing holes, the second redistribution layer includes a second pattern having a first line portion having a first line width and a second line portion connected to the first line portion and having a second line width greater than the first line width, and the second line portion overlaps at least one of the plurality of degassing holes when being projected in a direction perpendicular to the active surface.

公开(公告)号：US20190131270A1

公开(公告)日：2019-05-02

申请号：US15988647

申请日：2018-05-24

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jeong Ho LEE ,  Bong Ju CHO ,  Young Gwan KO ,  Jin Su KIM ,  Shang Hoon SEO ,  Jeong Il LEE

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L23/31

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface, and disposed in the recess portion so that the inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other, wherein the stopper layer includes an insulating material.

公开(公告)号：US20190131242A1

公开(公告)日：2019-05-02

申请号：US15981651

申请日：2018-05-16

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jeong Ho LEE ,  Myung Sam KANG ,  Young Gwan KO ,  Shang Hoon SEO ,  Jin Su KIM

IPC: H01L23/538 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; a first encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; an electronic component disposed on the other surface of the frame opposing one surface of the frame in which the semiconductor chip is disposed; a second encapsulant covering at least portions of the electronic component; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer, wherein the connection pads and the electronic component are electrically connected to each other through the wiring layers and the redistribution layer.

公开(公告)号：US20190122994A1

公开(公告)日：2019-04-25

申请号：US15950000

申请日：2018-04-10

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Yong Koon LEE ,  Jin Gu KIM ,  Jin Su KIM

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package includes a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least a portion of the semiconductor chip; and a connection member including an insulating layer disposed on the active surface of the semiconductor chip, a signal pattern disposed in the insulating layer, first ground patterns disposed to be spaced apart from the signal pattern on both sides of the signal pattern, second ground patterns disposed to be spaced apart from the signal pattern in an upper portion and a lower portion of the signal pattern, and line vias connecting the first ground patterns and the second ground patterns to each other and having a line shape.

公开(公告)号：US20190013256A1

公开(公告)日：2019-01-10

申请号：US15966723

申请日：2018-04-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Han Ul LEE ,  Jin Su KIM ,  Young Gwan KO

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L21/3105 ,  H01L21/56 ,  H01L21/48 ,  H01L21/683 ,  H01L25/18

CPC classification number: H01L23/3128 ,  H01L21/31058 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/18 ,  H01L2221/68345 ,  H01L2224/02377 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/0501 ,  H01L2224/05124 ,  H01L2224/05569 ,  H01L2224/05624 ,  H01L2224/06133 ,  H01L2224/11334 ,  H01L2224/13024 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/143 ,  H01L2924/1434 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/00014

Abstract: A semiconductor device includes: a chip having an active surface having connection pads disposed thereon; an encapsulant encapsulating at least portions of the chip; a connection member disposed on the active surface of the chip and including a redistribution layer electrically connected to the connection pads; a passivation layer disposed on the connection member; and an under bump metallurgy (UBM) layer at least partially embedded in the passivation layer and electrically connected to the redistribution layer of the connection member. The UBM layer includes a UBM pad partially embedded in the passivation layer and a UVM via penetrating through a portion of the passivation layer and electrically connecting the redistribution layer of the connection member and the UBM pad to each other. A portion of a side surface of the UBM pad is exposed through an opening formed in the passivation layer and the opening surrounds the UBM pad.

公开(公告)号：US20170018540A1

公开(公告)日：2017-01-19

申请号：US15075824

申请日：2016-03-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hyun LIM ,  Jong In RYU ,  Sung Ho KIM ,  Jin Su KIM

IPC: H01L25/16 ,  H01L23/31 ,  H01L25/00 ,  H01L21/78 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56

CPC classification number: H01L25/16 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01R23/68 ,  H01R23/6886 ,  H05K1/14 ,  H05K1/141 ,  H05K1/144 ,  H05K1/145 ,  H05K2201/041 ,  H05K2201/042 ,  H05K2201/043 ,  H05K2201/049 ,  H01L2924/014 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45099

Abstract: In one general aspect, an electronic device module includes a first board, a first device mounted on a first surface of the first board, a second board disposed below the first board, and a plurality of second devices disposed between the first board and the second board, wherein a surface of each second device the plurality of second devices is bonded to a second surface of the first board and another surface of each of the second devices is bonded to the second board.

Abstract translation: 在一个一般方面，电子设备模块包括第一板，安装在第一板的第一表面上的第一装置，设置在第一板下方的第二板，以及设置在第一板和第二板之间的多个第二装置 其中，所述多个第二装置的表面结合到所述第一板的第二表面，并且所述第二装置中的每一个的另一表面结合到所述第二板。

公开(公告)号：US20160122179A1

公开(公告)日：2016-05-05

申请号：US14673770

申请日：2015-03-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jin Su KIM

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81C1/0023 ,  H01L2224/12105 ,  H01L2224/96

Abstract: The sensor package according to an exemplary embodiment in the present disclosure includes a substrate; and at least one sensor chip mounted on a surface of the substrate, wherein the sensor chip is mounted on the substrate using a face-down bonding scheme.

Abstract translation: 根据本公开的示例性实施例的传感器封装包括基板; 以及安装在所述基板的表面上的至少一个传感器芯片，其中所述传感器芯片使用面朝下的接合方案安装在所述基板上。

公开(公告)号：US20140317919A1

公开(公告)日：2014-10-30

申请号：US14323728

申请日：2014-07-03

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jin Su KIM ,  Seog Moon CHOI

IPC: H05K3/34

CPC classification number: H05K3/3457 ,  H01L21/4853 ,  H01L24/11 ,  H01L2224/11003 ,  H01L2224/13099 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K3/0052 ,  H05K3/3478 ,  H05K2203/0405 ,  Y10T29/49128 ,  Y10T29/49135 ,  Y10T29/4914 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49169 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

Abstract: Embodiments of the invention provide a method of manufacturing a printed circuit board. The method includes the steps of mounting a strip substrate on a fixing member, and separating the strip substrate into unit substrates by performing a singulation process. The method further includes the steps of attaching solder balls onto the unit substrates using a mask disposed on the unit substrates, and fixing the solder balls on the unit substrates by performing a reflow process.

Abstract translation: 本发明的实施例提供一种制造印刷电路板的方法。 该方法包括以下步骤：将带状基材安装在固定部件上，并通过执行切割处理将带状基板分离成单元基板。 该方法还包括使用设置在单元基板上的掩模将焊球附着到单元基板上的步骤，以及通过进行回流处理将焊球固定在单元基板上。