Abstract:
An organic light emitting diode display includes: a substrate; a substrate insulating layer on the substrate; a capacitor on the substrate insulating layer; a driving thin film transistor including a driving gate electrode connected to the capacitor; and an organic light emitting element connected to the driving thin film transistor, where the capacitor includes: a first capacitor electrode on the substrate insulating layer; a second capacitor electrode on the first capacitor electrode; a capacitor insulating layer between the first capacitor electrode and the second capacitor electrode and contacting the first capacitor electrode and the second capacitor electrode, the capacitor insulating layer having a higher dielectric constant than the substrate insulating layer; and an auxiliary electrode contacting at least one of the first capacitor electrode or the second capacitor electrode.
Abstract:
An organic light emitting diode (OLED) display including a first pixel, a second pixel, and a third pixel disposed in a matrix and first to third driving voltage lines configured to transmit a driving voltage to the first to third pixel, respectively. A width of one driving voltage line among the first to third driving voltage lines is different from the width of the other driving voltage lines.
Abstract:
A backplane for a flat panel display apparatus, includes: a thin film transistor (TFT) on a substrate and including an active layer, a gate electrode, a source electrode, and a drain electrode; a light-blocking layer between the substrate and the TFT; a first insulating layer between the light-blocking layer and the TFT; a capacitor including a first electrode on the same plane as the light-blocking layer, and a second electrode on the first electrode, wherein the first insulating layer is between the first electrode and the second electrode; and a pixel electrode on the same plane as the light-blocking layer.
Abstract:
A capacitor positioned on a substrate insulating layer positioned on a substrate. The capacitor includes a first capacitor electrode positioned on the substrate insulating layer, a second capacitor electrode positioned on the first capacitor electrode, and a capacitor insulating layer coming into contact with the first capacitor electrode and the second capacitor electrode between the first capacitor electrode and the second capacitor electrode, and having a higher dielectric constant than the substrate insulating layer.
Abstract:
A backplane for a flat panel display apparatus, includes: a thin film transistor (TFT) on a substrate and including an active layer, a gate electrode, a source electrode, and a drain electrode; a light-blocking layer between the substrate and the TFT; a first insulating layer between the light-blocking layer and the TFT; a capacitor including a first electrode on the same plane as the light-blocking layer, and a second electrode on the first electrode, wherein the first insulating layer is between the first electrode and the second electrode; and a pixel electrode on the same plane as the light-blocking layer.
Abstract:
An organic light emitting diode (OLED) display includes a scan line, a data line, a driving voltage line, a switching transistor, a driving transistor and an OLED. The scan line is formed on a substrate to transmit a scan signal. The data line and the driving voltage line, intersecting the scan line, transmit a data signal and a driving voltage, respectively. The switching transistor, electrically coupled to the scan line and the data line, includes a switching semiconductor layer, a switching gate electrode, and a gate insulating layer having a first thickness. The driving transistor, electrically coupled to the switching drain electrode, includes a driving semiconductor layer, a driving gate electrode and a gate insulating layer having a second thickness. The OLED is electrically coupled to the driving drain electrode. The data line and the driving voltage line are formed with different layers from each other.
Abstract:
A display includes a switching transistor connected to a scan line and data line, a driving transistor connected to the switching transistor, a storage capacitor between a voltage line and the driving transistor, and an organic light emitting diode connected to the driving transistor. The data line and voltage line are at different layers, and the data line and a gate electrode of the driving transistor are at different layers. Also, a plate of the storage capacitor and the gate electrode of the driving transistor are of a same layer, and semiconductor layers of the switching and driving transistors are of a same layer.
Abstract:
A display device includes a substrate, an active layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a clad layer, a source electrode, and a drain electrode. The active layer is disposed on the substrate. The gate insulation layer is disposed on the active layer. The gate electrode is disposed on the gate insulation layer. The interlayer insulation layer is disposed on the gate electrode. A dielectric constant of the interlayer insulation layer is less than a dielectric constant of the gate insulation layer. The clad layer is disposed on the interlayer insulation layer. The source and drain electrodes are disposed on the clad layer.
Abstract:
A thin film transistor including: a substrate; an active layer formed over the substrate; a gate insulating layer formed over the active layer; a gate electrode formed over the gate insulating layer; an interlayer insulating layer formed over the gate electrode; and source and drain electrodes that contact the active layer via the interlayer insulating layer. The source and drain electrodes may have a structure including an aluminum (Al) layer, an aluminum-nickel alloy (AlNiX) layer, and an indium tin oxide (ITO) layer, which are sequentially stacked.
Abstract:
A thin film transistor including: a substrate; an active layer formed over the substrate; a gate insulating layer formed over the active layer; a gate electrode formed over the gate insulating layer; an interlayer insulating layer formed over the gate electrode; and source and drain electrodes that contact the active layer via the interlayer insulating layer. The source and drain electrodes may have a structure including an aluminum (Al) layer, an aluminum-nickel alloy (AlNiX) layer, and an indium tin oxide (ITO) layer, which are sequentially stacked.