公开(公告)号：US5270967A

公开(公告)日：1993-12-14

申请号：US642022

申请日：1991-01-16

申请人： Reza Moazzami ,  James M. Jaffe

发明人： Reza Moazzami ,  James M. Jaffe

IPC分类号： G11C11/409 ,  G11C11/22 ,  G11C11/406 ,  G11C14/00 ,  G11C7/00

CPC分类号： G11C11/22 ,  G11C11/223

摘要： The endurance of ferroelectric capacitors can be extended by refreshing the ferroelectric material. The ferroelectric material is refreshed by impressing a voltage across the ferroelectric capacitor, which voltage is higher than that which the capacitor experiences during normal operation. A memory array having ferroelectric capacitive cells can be refreshed by first reading the memory cells, temporarily storing the data in associated sense amplifiers, refreshing the memory cells by impressing a higher-than-normal voltage across the ferroelectric cell capacitors, then rewriting the temporarily stored data back into the memory cells. Refresh circuits connected between the drive line and bit line common to a number of cells are driven with voltages which are higher than the memory cell experiences during normal read operations. A V.sub.cc to ground pulse train is applied to the drive line, while an inverted waveform thereof is applied to the bit line during refresh operations.

公开(公告)号：US3938175A

公开(公告)日：1976-02-10

申请号：US526580

申请日：1974-11-25

申请人： James M. Jaffe ,  John Y. W. Seto

发明人： James M. Jaffe ,  John Y. W. Seto

IPC分类号： G01L9/00 ,  H01L21/00 ,  H01L29/84 ,  H01L29/04 ,  H01L29/06

CPC分类号： H01L29/84 ,  G01L9/0054 ,  H01L21/00 ,  Y10S438/977 ,  Y10T29/49103

摘要： A semiconductor pressure transducer having a polycrystalline silicon diaphragm providing an extremely pressure sensitive and temperature stable device, and a method of making the same. The polycrystalline silicon can easily be vapor deposited on an etch resistant layer covering a surface of a wafer or base, preferably monocrystalline silicon. Such vapor deposition of the polycrystalline silicon more accurately and consistently defines the thickness of the diaphragm than can be obtained by grinding or etching. A pressure responsive resistor formed in the diaphragm is automatically electrically isolated by the comparatively high resistivity of the polycrystalline silicon. Accordingly, PN junction isolation and passivating oxides on the diaphragm are not required thereby resulting in increased temperature stability.

摘要翻译： 一种具有提供极压敏和温度稳定装置的多晶硅隔膜的半导体压力传感器及其制造方法。 可以容易地将多晶硅气相沉积在覆盖晶片或基底，优选单晶硅表面的耐蚀刻层上。 多晶硅的这种气相沉积更准确和一致地限定了通过研磨或蚀刻可获得的膜的厚度。 形成在隔膜中的压力响应电阻器通过多晶硅的较高电阻率自动电隔离。 因此，不需要隔膜上的PN结隔离和钝化氧化物，从而导致温度稳定性的提高。

公开(公告)号：US5434396A

公开(公告)日：1995-07-18

申请号：US974131

申请日：1992-11-10

申请人： William H. Owen ,  James M. Jaffe

发明人： William H. Owen ,  James M. Jaffe

IPC分类号： G06K7/00 ,  G06K7/08 ,  G06K19/077 ,  G06K5/00

CPC分类号： G06K19/07779 ,  G06K19/07749 ,  G06K19/07783 ,  G06K7/0008 ,  G06K7/10336

摘要： A wireless communication system for communicating between a host system and a stand-alone device through an electromagnetic coupling medium is disclosed. The communication system has the capabilities of bi-directional data communications between the host and the stand-alone device and of powering the stand-alone device with energy pulses coupled through the electromagnetic coupling medium from the host. The electromagnetic medium is capable of supporting the bi-directional flow of energy pulses and energy transitions thereof between the host and stand-alone device. In one embodiment, bi-directional communication is provided by transmitting and detecting predetermined numbers of consecutive energy transitions coupled through the medium. Resting durations immediately precede and follow each predetermined number of consecutive energy transitions. In a preferred embodiment of the present invention, the host communicates a first binary value to the stand-alone device by coupling a first predetermined number of consecutive energy transitions to the device and a second binary value to the device by coupling a second predetermined number of consecutive energy transitions. Additionally, the host system receives data from the stand-alone device by first coupling a third predetermined number of consecutive energy transitions to the stand-alone device. The stand-alone device then responds by coupling a predetermined number of energy transitions to the medium during the resting duration following the host's transmission of the third predetermined number of consecutive energy transitions. The number of energy transitions sent by the stand-alone device during this resting duration is related to the value of the data digit being sent to the host.

摘要翻译： 公开了一种用于通过电磁耦合介质在主机系统和独立设备之间进行通信的无线通信系统。 通信系统具有在主机和独立设备之间进行双向数据通信的能力，并且通过从主机通过电磁耦合介质耦合的能量脉冲为独立设备供电。 电磁介质能够支持主机和独立设备之间的能量脉冲及其能量转换的双向流动。 在一个实施例中，通过发送和检测通过介质耦合的预定数量的连续能量跃迁来提供双向通信。 休息持续时间紧接在每个预定数量的连续能量转换之前。 在本发明的优选实施例中，主机通过将第一预定数量的连续能量转换耦合到装置并将第二二进制值耦合到装置，通过将第二预定数量的 连续能量转换。 此外，主机系统通过首先将第三预定数量的连续能量转换耦合到独立装置来从独立设备接收数据。 独立设备然后通过在主机传输第三预定数量的连续能量转换之后的静止持续时间期间将预定数量的能量转换耦合到介质来进行响应。 在该静止时间期间由独立设备发送的能量转换的数量与发送到主机的数据数据的值有关。

公开(公告)号：US5576988A

公开(公告)日：1996-11-19

申请号：US430017

申请日：1995-04-27

申请人： Max C. Kuo ,  James M. Jaffe

发明人： Max C. Kuo ,  James M. Jaffe

IPC分类号： H01L27/02 ,  H01L27/115 ,  G11C16/02 ,  H01L29/788

CPC分类号： H01L27/115 ,  H01L27/02 ,  Y10S257/922

摘要： An improved EEPROM structure is disclosed which provides protection against external detection of data stored within the array's memory cells via microprobing by causing the array's word lines to de-activate upon an attempted deprocessing of the array. An EEPROM "protect" cell is connected in parallel between each word line within the array and ground potential. Each of these protect cells has formed therein one or more substantially vertical cavities filled with a high etching film. These cavities are provided in a region adjacent to an end of the protect cell's floating gate such that during an attempted deprocessing of the array using an etching process in order to expose the array's word, bit, and control lines for microprobing, the etchant will rapidly diffuse through these cavities, exposing and discharging the floating gate before fully exposing the word, bit, and control lines. Once discharged, each protect cell shorts its associated word line to ground potential. Holding the word lines at ground potential in such a manner precludes the activation of the word lines and, therefore, effectively prevents the external reading of data stored within the array via microprobing.

摘要翻译： 公开了一种改进的EEPROM结构，其通过使阵列的字线在阵列的尝试的去除处理上被去激活来提供保护，以防止通过微阵列存储在阵列的存储单元内的数据的外部检测。 EEPROM“保护”单元在阵列中的每个字线和地电位之间并联连接。 这些保护电池中的每一个在其中形成有填充有高蚀刻膜的一个或多个基本垂直的空腔。 这些空腔设置在与保护电池的浮动栅极的端部相邻的区域中，使得在使用蚀刻工艺尝试去除阵列期间，以暴露阵列的字，位和用于微孔的控制线，蚀刻剂将快速 通过这些腔扩散，在完全暴露字，位和控制线之前对浮栅进行曝光和放电。 一旦放电，每个保护电池将其相关字线短路到地电位。 以这样的方式将字线保持在地电势排除了字线的激活，因此有效地防止了通过微阵列存储在阵列内的数据的外部读取。

公开(公告)号：US5475251A

公开(公告)日：1995-12-12

申请号：US251230

申请日：1994-05-31

申请人： Max C. Kuo ,  James M. Jaffe

发明人： Max C. Kuo ,  James M. Jaffe

IPC分类号： H01L21/336 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788

CPC分类号： H01L27/0203 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/7881 ,  Y10S257/907

摘要： An improved EEPROM cell structure is disclosed which provides protection against external detection of data stored within the cell. One or more cavities filled with a high etching film and extending in a substantially vertical direction are provided in a region adjacent to an end of the floating gate such that during an attempted deprocessing of the cell using an etching process, the etchant will rapidly diffuse through these cavities and expose the floating gate via these cavities before exposing and removing the control gate via the insulating layers overlapping the control gate. Any charge once present on the floating gate will dissipate before the control gate can be removed, thereby making it impossible to read data stored within the cell. In another embodiment, a sliver region of the floating gate extends laterally beyond the end of the control gate such that any etchant reaching the control gate will expose the sliver region prior to etching through the control gate, thereby discharging the floating gate before the control gate is removed.

摘要翻译： 公开了改进的EEPROM单元结构，其提供了防止存储在单元内的数据的外部检测的保护。 一个或多个填充有高蚀刻膜并在基本垂直方向上延伸的空腔设置在与浮动栅极的端部相邻的区域中，使得在使用蚀刻工艺对电池进行试图去除处理期间，蚀刻剂将快速扩散通过 这些空腔并且经由与控制栅极重叠的绝缘层暴露和去除控制栅极之前经由这些空腔暴露浮动栅极。 一旦存在于浮动栅极上的任何电荷将在控制栅极被去除之前消散，从而使得不可能读取存储在单元内的数据。 在另一个实施例中，浮动栅极的条状区域横向延伸超过控制栅极的端部，使得到达控制栅极的任何蚀刻剂将在蚀刻通过控制栅极之前暴露条状区域，从而在控制栅极之前放电浮动栅极 被删除。

公开(公告)号：US5086412A

公开(公告)日：1992-02-04

申请号：US616605

申请日：1990-11-21

申请人： James M. Jaffe ,  Norman E. Abt

发明人： James M. Jaffe ,  Norman E. Abt

IPC分类号： G11C11/22 ,  G11C14/00

CPC分类号： G11C11/22

摘要： A ferroelectric random access memory device contains columns of ferroelectric memory cells, each column of memory cells being coupled to a distinct bit line. Each memory cell is selectively coupled to a corresponding bit line by an access control transistor so that only one memory cell in the column is coupled to the bit line at a time. To read the data stored in a selected memory cell reads, the cell is strobed twice, separately sampling the output voltage generated each time. Since the first read is a destructive read, the second read operation always reads the cell in its "0" state. Then the two sampled outputs are compared, and if the first reading exceeds the second by at least a threshold amount then a "1" output value is generated. Otherwise a "0" is the output value. In a preferred embodiment, the time delay between strobing the memory cell and sampling its output is made longer the first time that the cell is read than for the second time that the cell is read. In this way, if the cell is storing a "0" bit, the first read will produce an output voltage that is smaller than it would have been had the first read not been delayed, which helps to ensure that cells storing "0" bit values are properly sensed.

公开(公告)号：US4135292A

公开(公告)日：1979-01-23

申请号：US702576

申请日：1976-07-06

申请人： James M. Jaffe ,  Jack I. Penton

发明人： James M. Jaffe ,  Jack I. Penton

IPC分类号： H01L21/265 ,  H01L21/285 ,  B01J17/00

CPC分类号： H01L21/26513 ,  H01L21/28512

摘要： An integrated circuit aluminum-silicon electrical contact may be fabricated in a diffusion region formed in a monocrystalline silicon semiconductor layer by converting the upper portion of the diffusion region into an amorphous region. Alloy pitting is substantially decreased since the solubility of silicon in aluminum is highly dependent upon crystallographic orientation of the silicon and decreases as the silicon approaches an amorphous form. The amorphous region may be formed by implanting arsenic ions with an energy of at least 180 keV and a dosage of approximately 10.sup.15 ions/cm.sup.2.

摘要翻译： 可以通过将扩散区域的上部转化为非晶区域，在形成于单晶硅半导体层中的扩散区域中制造集成电路铝 - 硅电接触。 合金点蚀显着降低，因为硅在铝中的溶解度高度依赖于硅的结晶取向，并且随着硅接近无定形形式而降低。 可以通过以至少180keV的能量和约1015个离子/ cm 2的剂量注入砷离子形成非晶区域。

公开(公告)号：US4065715A

公开(公告)日：1977-12-27

申请号：US702110

申请日：1976-07-02

申请人： James M. Jaffe ,  John W. Hile

发明人： James M. Jaffe ,  John W. Hile

IPC分类号： G01D5/24 ,  G01D5/246 ,  H03K7/08 ,  G01R27/26

CPC分类号： H03K7/08 ,  G01D5/24 ,  G01D5/246

摘要： A transducer for producing a pulse duration modulated signal in accord with the value of a parameter. A reference capacitor-resistance circuit is provided having a predetermined rate of capacitor discharge and a second capacitor-resistance circuit is provided having a capacitor and a resistor, one of which is varied in accordance with the parameter to define a rate of capacitor discharge determined by the parameter. Each of the capacitors is periodically charged in unison to a predetermined voltage. Respective level detectors monitor the capacitor voltage charges and generate respective digital signals when the voltage charge monitored is greater than a predetermined reference below which each capacitor discharges during the time interval between charges. A logic circuit monitors the digital signals and produces a series of pulses having durations determined by the value of the parameter.

摘要翻译： 用于根据参数的值产生脉冲持续时间调制信号的换能器。 提供具有预定速率的电容器放电的参考电容器电阻电路，并且提供具有电容器和电阻器的第二电容器电阻电路，其中一个电容器和电阻器根据参数而变化，以限定电容器放电率，由 参数。 每个电容器被一致地定时充电到预定的电压。 各电平检测器监测电容器电压电荷，并在监测到的电压电荷大于预定参考值时产生相应的数字信号，低于该预定参考值，每个电容器在电荷之间的时间间隔期间放电。 逻辑电路监视数字信号并产生具有由参数的值确定的持续时间的一系列脉冲。

公开(公告)号：US4003127A

公开(公告)日：1977-01-18

申请号：US616959

申请日：1975-09-26

申请人： James M. Jaffe ,  John Y. W. Seto

发明人： James M. Jaffe ,  John Y. W. Seto

IPC分类号： G01L9/00 ,  H01L21/00 ,  H01L29/84 ,  B01J17/00

CPC分类号： H01L29/84 ,  G01L9/0054 ,  G01L9/0055 ,  H01L21/00 ,  Y10T29/49103

摘要： A semiconductor pressure transducer having a polycrystalline silicon diaphragm providing an extremely pressure sensitive and temperature stable device, and a method of making the same. The polycrystalline silicon can easily be vapor deposited on an etch resistant layer covering a surface of a wafer or base, preferably monocrystalline silicon. Such vapor deposition of the polycrystalline silicon more accurately and consistently defines the thickness of the diaphragm than can be obtained by grinding or etching. A pressure responsive resistor formed in the diaphragm is automatically electrically isolated by the comparatively high resistivity of the polycrystalline silicon. Accordingly, PN junction isolation and passivating oxides on the diaphragm are not required thereby resulting in increased temperature stability.

摘要翻译： 一种具有提供极压敏和温度稳定装置的多晶硅隔膜的半导体压力传感器及其制造方法。 可以容易地将多晶硅气相沉积在覆盖晶片或基底，优选单晶硅的表面的耐蚀刻层上。 多晶硅的这种气相沉积更准确和一致地限定了通过研磨或蚀刻可获得的膜的厚度。 形成在隔膜中的压力响应电阻器通过多晶硅的较高电阻率自动电隔离。 因此，不需要隔膜上的PN结隔离和钝化氧化物，从而导致温度稳定性的提高。

公开(公告)号：US3941629A

公开(公告)日：1976-03-02

申请号：US460106

申请日：1974-04-11

申请人： James M. Jaffe

发明人： James M. Jaffe

IPC分类号： G01L9/00 ,  H01L21/00 ,  H01L29/00 ,  H01L29/84 ,  C23F1/02

CPC分类号： H01L29/84 ,  G01L9/0042 ,  H01L21/00 ,  H01L29/00 ,  Y10S438/977

摘要： A method of making thin diaphragms having an accurately controllable thickness for semiconductor pressure responsive devices. An oxide coating is thermally grown in selected regions on the front side of a silicon wafer. The oxide extends into the wafer at an extremely accurate and controllable depth to form a groove in the wafer front side defined by the selected regions. Portions of the wafer are then etched from the back side until the bottom of the groove is reached thereby providing a diaphragm having a thickness equal to the accurately reproducible depth of the groove.

摘要翻译： 一种用于半导体压力响应装置制造具有精确可控厚度的薄隔膜的方法。 氧化物涂层在硅晶片正面的选定区域热生长。 氧化物以非常精确和可控的深度延伸到晶片中，以在由所选择的区域限定的晶片正面中形成凹槽。 然后从后侧蚀刻晶片的一部分，直到达到凹槽的底部，从而提供厚度等于凹槽的精确再现深度的膜片。