公开(公告)号：US20170092614A1

公开(公告)日：2017-03-30

申请号：US15375072

申请日：2016-12-09

Applicant: Renesas Electronics Corporation

Inventor： Toshihiro IWASAKI ,  Takeumi KATO ,  Takanori OKITA ,  Yoshikazu SHIMOTE ,  Shinji BABA ,  Kazuyuki NAKAGAWA ,  Michitaka KIMURA

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L24/81 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/04 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/75 ,  H01L24/83 ,  H01L24/94 ,  H01L25/043 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/0756 ,  H01L25/117 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03622 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/051 ,  H01L2224/056 ,  H01L2224/1132 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14104 ,  H01L2224/14131 ,  H01L2224/1605 ,  H01L2224/1701 ,  H01L2224/1703 ,  H01L2224/73204 ,  H01L2224/75252 ,  H01L2224/75745 ,  H01L2224/75824 ,  H01L2224/8101 ,  H01L2224/81024 ,  H01L2224/81048 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81194 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81986 ,  H01L2224/831 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3841 ,  H01L2224/81201 ,  H01L2924/00

Abstract: The joint reliability in flip chip bonding of a semiconductor device is enhanced. Prior to flip chip bonding, flux 9 is applied to the solder bumps 5a for flip chip bonding over a substrate and reflow/cleaning is carried out and then flip chip bonding is carried out. This makes is possible to thin the oxide film over the surfaces of the solder bumps 5a and make the oxide film uniform. As a result, it is possible to suppress the production of local solder protrusions to reduce the production of solder bridges during flip chip bonding and enhance the joint reliability in the flip chip bonding of the semiconductor device.

公开(公告)号：US20130244381A1

公开(公告)日：2013-09-19

申请号：US13795374

申请日：2013-03-12

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Katsuhito KAMACHI ,  Takanori OKITA

IPC: H01L21/50

CPC classification number: H01L21/50 ,  H01L21/4842 ,  H01L23/49562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29144 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48639 ,  H01L2224/48739 ,  H01L2224/48839 ,  H01L2224/73265 ,  H01L2224/83439 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85439 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2224/83205

Abstract: A manufacturing yield of a semiconductor device including a power transistor is improved. When forming a tip portion LE1c of a first lead, a tip portion LE2c of a second lead, and a tip portion LE3c of a third lead by using a spanking die SDM1, the tip portion LE1c of the first lead, the tip portion LE2c of the second lead, and the tip portion LE3c of the third lead are pressed by an upper surface of a protrusion portion provided on a pressing surface of a lower die SD1 and a bottom surface of a groove portion provided in a pressing surface of an upper die SU1, and a bent portion of the second lead and a bent portion of the third lead are pressed by a flat pressing surface of the lower die SD1 and a flat pressing surface of the upper die SU1.

Abstract translation: 提高了包括功率晶体管的半导体器件的制造成品率。 当使用打屁股模具SDM1形成第一引线的尖端部分LE1c，第二引线的尖端部分LE2c和第三引线的尖端部分LE3c时，第一引线的尖端部分LE1c，尖端部分LE2c的尖端部分LE2c 第二引线和第三引线的尖端部分LE3c被设置在下模具SD1的按压表面上的突出部分的上表面和设置在上模具的按压表面中的凹槽部分的底表面 SU1，第二引线的弯曲部分和第三引线的弯曲部分被下模具SD1的平坦的按压面和上模具SU1的平坦的按压面按压。