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    DECODING METHOD, DECODING APPARATUS, AND ENCODING METHOD
    1.
    发明申请
    DECODING METHOD, DECODING APPARATUS, AND ENCODING METHOD 审中-公开

    公开(公告)号：US20200296409A1

    公开(公告)日：2020-09-17

    申请号：US16811943

    申请日：2020-03-06

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Ryoji HASHIMOTO ,  Seiji MOCHIZUKI

    IPC: H04N19/52 ,  H04N19/176 ,  H04N19/184 ,  H04N19/159

    Abstract: The decoding method is a decoding method for decoding a bitstream, in which a difference between a reference index and a prediction value of a motion vector is used for each block obtained by dividing each frame of a moving picture in which a plurality of frames are consecutive, in which a plurality of groups having a predetermined number of blocks are defined in each frame and a limitation is applied for each group to a range of reference index and differences of blocks other than the first block in the group, and the decoding method includes a step for determining whether the block to be decoded is the first block of the group, a step for decoding using the reference index and difference if the block is not the first block, and a step for decoding using the limited reference index and differences if the block is not the first block.

    DATA PROCESSING DEVICE AND DATA PROCESSING METHOD
    2.
    发明申请
    DATA PROCESSING DEVICE AND DATA PROCESSING METHOD 审中-公开

    公开(公告)号：US20200228842A1

    公开(公告)日：2020-07-16

    申请号：US16834616

    申请日：2020-03-30

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Katsushige MATSUBARA ,  Seiji MOCHIZUKI ,  Keisuke MATSUMOTO

    IPC: H04N19/65 ,  H04L1/00 ,  H04N19/503 ,  H04N19/159 ,  H04N19/176 ,  H04N19/42 ,  H03M7/30 ,  H03M13/00

    Abstract: Provided is a data processing device that reduces the amount of memory access in a case where data and an error control code are to be stored in a memory. The processing device includes a data compression section, a code generation section, a binding section, and a transfer section. The data compression section generates second data by performing a predetermined compression process on first data that is to be stored in a memory and of a predetermined data length. The code generation section generates an error control code for the first data or the second data. The binding section generates third data by binding the second data generated by the data compression section to the error control code generated by the code generation section. The transfer section transfers the third data generated by the binding section to the memory in units of the predetermined data length.

    IMAGE ENCODER, IMAGE DECODER, AND IMAGE TRANSMISSION DEVICE
    5.
    发明申请
    IMAGE ENCODER, IMAGE DECODER, AND IMAGE TRANSMISSION DEVICE 审中-公开
    图像编码器，图像解码器和图像传输装置

    公开(公告)号：US20170064312A1

    公开(公告)日：2017-03-02

    申请号：US15206248

    申请日：2016-07-09

    Applicant: Renesas Electronics Corporation

    Inventor： Tomohiro UNE ,  Takahiko SUGIMOTO ,  Kwangsoo PARK ,  Toshiyuki KAYA ,  Tetsuya SHIBAYAMA ,  Seiji MOCHIZUKI

    IPC: H04N19/186

    CPC classification number: H04N19/186 ,  H04N19/117 ,  H04N19/36 ,  H04N19/80

    Abstract: Making effective use of an image encoder and an image decoder for processing a color image of a general-purpose standard bit depth, an image transmission device capable of transmitting/receiving a monochrome image of a higher bit depth is configured. An image transmission device includes an image encoder to encode a high bit-depth monochrome image and output encoded data and an image decoder to generate, by decoding the encoded data received via a transmission path, a high bit-depth monochrome image. The image encoder decomposes the input high bit-depth image data into plural bit planes corresponding to color image data of a standard bit depth and encodes the standard bit-depth color image data. The image decoder decodes the color image data of the standard bit depth and synthesizes, from the decoded standard bit-depth color image data, a high bit-depth monochrome image.

    Abstract translation: 通过有效利用图像编码器和图像解码器来处理通用标准位深度的彩色图像，可以配置能够发送/接收更高位深度的单色图像的图像发送装置。 图像传输装置包括：图像编码器，用于对高位深度单色图像进行编码并输出编码数据;以及图像解码器，通过对通过传输路径接收的编码数据进行解码，生成高位深度单色图像。 图像编码器将输入的高位深度图像数据分解成与标准位深度的彩色图像数据相对应的多个位平面，并对标准位深度彩色图像数据进行编码。 图像解码器对标准位深度的彩色图像数据进行解码，并从解码的标准位深度彩色图像数据中合成高位深度单色图像。

    VIDEO ENCODING/DECODING SYSTEM AND DIAGNOSIS METHOD THEREOF
    7.
    发明申请
    VIDEO ENCODING/DECODING SYSTEM AND DIAGNOSIS METHOD THEREOF 审中-公开

    公开(公告)号：US20180343461A1

    公开(公告)日：2018-11-29

    申请号：US16053244

    申请日：2018-08-02

    Applicant: Renesas Electronics Corporation

    Inventor： Seiji MOCHIZUKI ,  Toshiyuki KAYA ,  Hiroshi UEDA ,  Tetsuya SHIBAYAMA

    IPC: H04N19/46 ,  H04N19/65 ,  H04N17/00 ,  H04N19/44 ,  H04N19/89

    CPC classification number: H04N19/46 ,  H04N17/004 ,  H04N19/44 ,  H04N19/65 ,  H04N19/89

    Abstract: A video encoding/decoding system includes a video encoding device, and a video decoding device. The video encoding device includes an encoding circuit for encoding an image including a diagnostic image or a normal image. The video decoding device includes a decoding circuit for decoding the image encoded in the encoding circuit, a check signal generation circuit for generating a check signal of the decoded image, a storage circuit for storing the check signal generated by the check signal generation circuit, and a comparison circuit for comparing the check signal stored in the storage circuit with the check signal generated by the check signal generation circuit. The failure is detected by comparing the check signal including an expected value stored in the storage circuit with the check signal including a comparison value generated by the check signal generation circuit by processing the same image data a plurality of times.

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20180288418A1

    公开(公告)日：2018-10-04

    申请号：US16001559

    申请日：2018-06-06

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Ren IMAOKA ,  Seiji MOCHIZUKI ,  Toshiyuki KAYA ,  Kazushi AKIE ,  Ryoji HASHIMOTO

    IPC: H04N19/139 ,  H04N19/137 ,  H04N19/132 ,  H04N19/172 ,  H04N19/124 ,  H04N19/105 ,  H04N19/61

    Abstract: A semiconductor device includes a hash generator, a reference hash list, a frame mode determination unit, and an intra prediction unit. The hash generator generates a hash value of a target frame to be encoded. The reference hash list is to record the hash value generated by the hash generator. The frame mode determination unit compares the hash value generated by the hash generator and the hash value in the reference hash list. The intra prediction unit performs intra prediction for the target frame to be encoded. When the hash value of the target frame to be encoded coincides with any of the hash values in the reference hash list, the intra prediction unit skips an encoding process, and outputs encoded information corresponding to any of the hash values in the reference hash list.

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