公开(公告)号：US11177819B1

公开(公告)日：2021-11-16

申请号：US17111208

申请日：2020-12-03

Applicant: QUALCOMM Incorporated

Inventor： Zhengzheng Wu ,  Chao Song ,  Karthik Nagarajan

IPC: H03M1/06 ,  H03M1/82 ,  G04F10/00

Abstract: A digital-to-time converter (DTC) converts a digital code into a time delay using a capacitor digital-to-analog converter (CDAC) that functions as a charging capacitor. The DTC includes a switched capacitor voltage-to-current converter for the formation of a charging current (or a discharging current) for charging (or for discharging) the charging capacitor responsive to a triggering clock edge that begins the time delay. A comparator compares a voltage on the charging capacitor to a threshold voltage to determine an end of the time delay.

公开(公告)号：US10600569B2

公开(公告)日：2020-03-24

申请号：US15961594

申请日：2018-04-24

Applicant: QUALCOMM Incorporated

Inventor： Ye Lu ,  Haitao Cheng ,  Chao Song

IPC: H01L23/52 ,  H01G4/10 ,  H01L23/522 ,  H01G4/01

Abstract: Methods, systems, and devices for a finger metal-on-metal (FMOM) capacitor including a negative capacitance material are described. In one examples, a FMOM capacitor may include a first electrode and a second electrode. The FMOM capacitor may include a dielectric layer coating a first sidewall of the first electrode and a second sidewall of a second electrode. A portion of the first sidewall may be substantially parallel to a portion of the second sidewall. The FMOM capacitor may also include a negative capacitance material disposed in a channel between the first sidewall of the first electrode and the second sidewall of the second electrode. The negative capacitance material may extend in a direction that is substantially parallel to the portion of the first sidewall and the portion of the second sidewall.

公开(公告)号：US20170293314A1

公开(公告)日：2017-10-12

申请号：US15250064

申请日：2016-08-29

Applicant: QUALCOMM Incorporated

Inventor： Chao Song ,  Kevin Wang

IPC: G05F3/26

CPC classification number: G05F3/267 ,  G05F3/262

Abstract: A current mirroring circuit including: a first portion having a first resistor and a first transistor, the first transistor having a control terminal coupled to a control terminal of a first diode-connected transistor; and a second portion having a second resistor and a second transistor, the second transistor having a control terminal coupled to a control terminal of a second diode-connected transistor, the first portion being in electrical communication with a first power level and the second portion being in electrical communication with a second power level, the first portion being coupled to the second portion.

公开(公告)号：US10896949B2

公开(公告)日：2021-01-19

申请号：US16106160

申请日：2018-08-21

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Chao Song ,  Ye Lu

IPC: H01L49/02 ,  H01F17/00 ,  H01L23/522 ,  H01L27/08

Abstract: Aspects generally relate to adjusting, or lowering, the Q of an inductor. In one embodiment, an integrated circuit includes an inductor and a conductive closed ring inside a periphery of the inductor. In another embodiment, there can be a plurality of closed rings inside the periphery of the inductor. The conductive closed rings are magnetically coupled to the inductor to adjust the Q.

公开(公告)号：US20190089030A1

公开(公告)日：2019-03-21

申请号：US15710737

申请日：2017-09-20

Applicant: QUALCOMM Incorporated

Inventor： Chao Song ,  Xuhao Huang ,  Marzio Pedrali-Noy

IPC: H01P1/203 ,  H05K3/30 ,  H01L21/82 ,  H01L21/74

Abstract: A process-invariant RC circuit is formed by patterning a metal layer using the same mask pattern to form a metal layer resistor and a metal layer capacitor. The same mask pattern results in the metal layer resistor and the metal layer capacitor each having a plurality of longitudinally-extending fingers having the same width and separation.

公开(公告)号：US09851740B2

公开(公告)日：2017-12-26

申请号：US15250064

申请日：2016-08-29

Applicant: QUALCOMM Incorporated

Inventor： Chao Song ,  Kevin Wang

IPC: G01F1/10 ,  G05F3/08 ,  G05F3/20 ,  G05F3/26

CPC classification number: G05F3/267 ,  G05F3/262

Abstract: A current mirroring circuit including: a first portion having a first resistor and a first transistor, the first transistor having a control terminal coupled to a control terminal of a first diode-connected transistor; and a second portion having a second resistor and a second transistor, the second transistor having a control terminal coupled to a control terminal of a second diode-connected transistor, the first portion being in electrical communication with a first power level and the second portion being in electrical communication with a second power level, the first portion being coupled to the second portion.

公开(公告)号：US10861793B2

公开(公告)日：2020-12-08

申请号：US16051525

申请日：2018-08-01

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Ye Lu ,  Chao Song

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/58 ,  H01L23/522

Abstract: Aspects generally relate to tuning a guard ring in an integrated circuit. A guard ring with a gap surrounds a circuit. The level of isolation provided by the guard ring at a particular frequency can be adjusted by coupling a tuning circuit cross the gap of the guard ring. If the circuit in the guard ring is an inductive circuit the level of inductance at a particular frequency can be adjusted by selecting the appropriate tuning circuit across the gap of the guard ring.

公开(公告)号：US10545523B1

公开(公告)日：2020-01-28

申请号：US16170700

申请日：2018-10-25

Applicant: QUALCOMM Incorporated

Inventor： Zhengzheng Wu ,  Chao Song

IPC: G05F1/595 ,  G05F1/575

Abstract: A load circuit of a low-dropout (LDO) regulator is disclosed herein according to certain aspects. The load circuit includes a field effect transistor having a source coupled to a supply rail, a gate, and a drain coupled to a gate of a pass transistor of the LDO regulator. The load circuit also includes an adjustable voltage source coupled between the drain and the gate of the field effect transistor, and a voltage control circuit configured to detect a change in a current load through the pass transistor, and to adjust a voltage of the adjustable voltage source based on the detected change in the current load.

公开(公告)号：US09755575B1

公开(公告)日：2017-09-05

申请号：US15191350

申请日：2016-06-23

Applicant: QUALCOMM Incorporated

Inventor： Kevin Wang ,  Chao Song ,  Shyam Sivakumar

IPC: H03K3/03 ,  H03B5/24 ,  H03L7/099 ,  H03K5/1252 ,  H03K5/06

CPC classification number: H03B5/24 ,  H03B5/26 ,  H03K3/03 ,  H03K3/0315 ,  H03K5/065 ,  H03K5/1252 ,  H03L7/099

Abstract: An oscillator circuit having a programmable output frequency may include a first delay section having a negative gain and a variable delay that is set by a control signal provided to the first delay section. A second delay section having a negative gain and a fixed delay may be connected in series with the first delay section. The oscillator circuit may include an output comprising the output of the second delay section having a frequency that is dependent on the delay of the first delay section and the delay of second delay section.

公开(公告)号：US11626883B2

公开(公告)日：2023-04-11

申请号：US17449250

申请日：2021-09-28

Applicant: QUALCOMM Incorporated

Inventor： Zhengzheng Wu ,  Chao Song ,  Karthik Nagarajan

IPC: H03M1/06 ,  H03M1/82 ,  G04F10/00 ,  H03K5/24 ,  H03M1/80

Abstract: A digital-to-time converter (DTC) converts a digital code into a time delay using a capacitor digital-to-analog converter (CDAC) that functions as a charging capacitor. The DTC includes a switched capacitor voltage-to-current converter for the formation of a charging current (or a discharging current) for charging (or for discharging) the charging capacitor responsive to a triggering clock edge that begins the time delay. A comparator compares a voltage on the charging capacitor to a threshold voltage to determine an end of the time delay.