公开(公告)号：US10896949B2

公开(公告)日：2021-01-19

申请号：US16106160

申请日：2018-08-21

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Chao Song ,  Ye Lu

IPC: H01L49/02 ,  H01F17/00 ,  H01L23/522 ,  H01L27/08

Abstract: Aspects generally relate to adjusting, or lowering, the Q of an inductor. In one embodiment, an integrated circuit includes an inductor and a conductive closed ring inside a periphery of the inductor. In another embodiment, there can be a plurality of closed rings inside the periphery of the inductor. The conductive closed rings are magnetically coupled to the inductor to adjust the Q.

公开(公告)号：US11289365B2

公开(公告)日：2022-03-29

申请号：US16676663

申请日：2019-11-07

Applicant: QUALCOMM Incorporated

Inventor： Junjing Bao ,  Ye Lu ,  Haitao Cheng

IPC: H01L21/64 ,  H01L29/06 ,  H01L49/02 ,  H01L21/764

Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device including an air gap underneath passive devices. The semiconductor device generally includes a substrate layer, a passive device layer, and a dielectric layer disposed between the substrate layer and the passive device layer, wherein the dielectric layer includes an air gap disposed beneath at least one passive device in the passive device layer.

公开(公告)号：US10600569B2

公开(公告)日：2020-03-24

申请号：US15961594

申请日：2018-04-24

Applicant: QUALCOMM Incorporated

Inventor： Ye Lu ,  Haitao Cheng ,  Chao Song

IPC: H01L23/52 ,  H01G4/10 ,  H01L23/522 ,  H01G4/01

Abstract: Methods, systems, and devices for a finger metal-on-metal (FMOM) capacitor including a negative capacitance material are described. In one examples, a FMOM capacitor may include a first electrode and a second electrode. The FMOM capacitor may include a dielectric layer coating a first sidewall of the first electrode and a second sidewall of a second electrode. A portion of the first sidewall may be substantially parallel to a portion of the second sidewall. The FMOM capacitor may also include a negative capacitance material disposed in a channel between the first sidewall of the first electrode and the second sidewall of the second electrode. The negative capacitance material may extend in a direction that is substantially parallel to the portion of the first sidewall and the portion of the second sidewall.

公开(公告)号：US10511278B2

公开(公告)日：2019-12-17

申请号：US15959824

申请日：2018-04-23

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Zhang Jin

IPC: H03H7/42 ,  H01F27/29 ,  H01F27/42

Abstract: Certain aspects of the present disclosure are generally directed to a structure for a balanced-unbalanced (balun) transformer. For example, certain aspects of the present disclosure provide a transformer that generally includes a first winding having a first terminal coupled to an input node and a second terminal coupled to a reference potential node. The transformer may also include a first impedance coupled between a center tap of the first winding and the reference potential node, and a second winding magnetically coupled to the first winding and having a first terminal coupled to a first differential node of a differential output pair, a second terminal coupled to a second differential node of the differential output pair, and a center tap coupled to the reference potential node.

公开(公告)号：US10236573B2

公开(公告)日：2019-03-19

申请号：US15687065

申请日：2017-08-25

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Zhang Jin

IPC: H01Q1/52 ,  H01Q1/48 ,  H01Q1/22

Abstract: A capacitor radio frequency (RF) shielding structure may include a ground plane partially surrounding a coupling capacitor in an RF signal path. The ground plane may include a first ground plane portion extending between a positive terminal of the RF signal path and a negative terminal of the RF signal path. The ground plane may include a second ground plane portion extending between the positive terminal and the negative terminal of the RF signal path. The second ground plane portion may be opposed the first ground plane portion. The capacitor RF shielding structure may also include a patterned shielding layer electrically contacting the first ground plane portion and/or the second ground plane portion. The patterned shielding layer may electrically disconnecting a return current path over the patterned shielding layer to confine a return current to flowing over the first ground plane portion or the second ground plane portion.

公开(公告)号：US10861793B2

公开(公告)日：2020-12-08

申请号：US16051525

申请日：2018-08-01

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Ye Lu ,  Chao Song

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/58 ,  H01L23/522

Abstract: Aspects generally relate to tuning a guard ring in an integrated circuit. A guard ring with a gap surrounds a circuit. The level of isolation provided by the guard ring at a particular frequency can be adjusted by coupling a tuning circuit cross the gap of the guard ring. If the circuit in the guard ring is an inductive circuit the level of inductance at a particular frequency can be adjusted by selecting the appropriate tuning circuit across the gap of the guard ring.

公开(公告)号：US10573950B2

公开(公告)日：2020-02-25

申请号：US15947293

申请日：2018-04-06

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Zhang Jin ,  Abbas Abbaspour-Tamijani

IPC: H01P5/18 ,  H03H7/48 ,  H04L25/02 ,  H03F1/56 ,  H03F3/20 ,  H03H7/01 ,  H04W88/06 ,  H04B1/04 ,  H04B1/18 ,  H03H7/46 ,  H03F3/60 ,  H03F3/195 ,  H03F3/24

Abstract: Certain aspects of the present disclosure provide a directional coupler. In certain aspects, the directional coupler generally includes a first inductor and a second inductor wirelessly coupled to the first inductor. In certain aspects, the directional coupler generally includes an input port at a first terminal of the first inductor and a transmitted port at a second terminal of the first inductor. In certain aspects, the directional coupler generally includes a coupled port at a first terminal of the second inductor and an isolated port at a second terminal of the second inductor. In certain aspects, the directional coupler generally includes a first complex impedance component directly coupled to the isolated port and a second complex impedance component directly coupled to the coupled port.

公开(公告)号：US10446898B2

公开(公告)日：2019-10-15

申请号：US15687129

申请日：2017-08-25

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Zhang Jin

IPC: H01P3/00 ,  H05K1/02 ,  H01P1/30 ,  H01P11/00

Abstract: A coplanar waveguide may include a first transmission line extending between a first ground plane and a second ground plane at a first interconnect level. The coplanar waveguide may further include a shielding layer at a second interconnect level. The shielding layer may include a first set of conductive fingers coupled to the first ground plane. The first set of conductive fingers may be interdigitated with a second set of conductive fingers that are coupled to the second ground plane. Only a dielectric layer may be between the first set of conductive interdigitated fingers and the second set of conductive interdigitated fingers. The first ground plane, the second ground plane, the dielectric layer, and the shielding layer may form a capacitor.

公开(公告)号：US11004784B2

公开(公告)日：2021-05-11

申请号：US16158742

申请日：2018-10-12

Applicant: QUALCOMM Incorporated

Inventor： Haitao Cheng ,  Ye Lu ,  Chao Song

IPC: H01L23/52 ,  H01L23/522 ,  H01L23/58 ,  H01G4/06 ,  H01L49/02

Abstract: Certain aspects of the present disclosure provide a metal-on-metal (MoM) capacitor with metal layers, each layer having two different electrical conductors with orthogonally-arranged conductive arteries and orthogonally-oriented conductive fingers. One exemplary MoM capacitor generally includes a plurality of metal layers, wherein a first metal layer in the plurality of metal layers comprises a first electrical conductor providing a first node of the MoM capacitor and a second electrical conductor providing a second node of the MoM capacitor. According to aspects, the first electrical conductor comprises a first plurality of conductive fingers and the second electrical conductor comprises a second plurality of conductive fingers. Further, conductive fingers of the first plurality of conductive fingers are interdigitated with conductive fingers of the second plurality of conductive fingers. Additionally, the first electrical conductor in the first metal layer is oriented orthogonal to the second electrical conductor in the first metal layer.

公开(公告)号：US10972068B2

公开(公告)日：2021-04-06

申请号：US16023186

申请日：2018-06-29

Applicant: QUALCOMM Incorporated

Inventor： Chao Song ,  Haitao Cheng ,  Ye Lu ,  Dongjiang Qiao

IPC: H03H7/30 ,  H03H1/02 ,  H03H3/00 ,  H03H7/06 ,  H01L49/02 ,  H01L23/66 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532

Abstract: An integrated circuit (IC) device includes a first resistive strip having an input terminal and an output terminal. The IC device further includes a second resistive strip having a terminal coupled to a voltage. The second resistive strip may be coplanar with the first resistive strip. The IC device further includes a capacitor formed by the first resistive strip and the second resistive strip.