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公开(公告)号:US10085027B2
公开(公告)日:2018-09-25
申请号:US14737252
申请日:2015-06-11
Applicant: QUALCOMM Incorporated
Inventor: Chengjie Tu , Wei-Jung Chien , Xianglin Wang , Jaehong Chon , In Suk Chong , Marta Karczewicz , Woo-Shik Kim , Xin Zhao
IPC: H04N11/02 , H04N19/14 , H04N19/147 , H04N19/176 , H04N19/119 , H04N19/109 , H04N19/157 , H04N19/567 , H04N19/174
CPC classification number: H04N19/14 , H04N19/109 , H04N19/119 , H04N19/147 , H04N19/157 , H04N19/174 , H04N19/176 , H04N19/567
Abstract: A video encoding device comprises a memory configured and at least one processor configured to: determine whether a metric meets a condition based on statistics, wherein the statistics are associated with a first video encoding mode checking order and a second video encoding mode checking order, responsive to determining that the metric meets the condition, select a first encoding mode checking order to encode the first block of video data responsive to determining that the condition is not met, select a second encoding mode checking order different from the first encoding mode checking order to encode the first block of video data, update the statistics based on the selected first or second encoding mode checking order, and encode a second block of video data, based on the updated statistics, and using the first or second mode checking order.
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公开(公告)号:US09998739B2
公开(公告)日:2018-06-12
申请号:US15060273
申请日:2016-03-03
Applicant: QUALCOMM Incorporated
Inventor: Jaehong Chon , In Suk Chong , Wei-Jung Chien , Xianglin Wang , Marta Karczewicz
IPC: H04N7/12 , G06K9/46 , H04N19/139 , H04N19/119 , H04N19/176 , H04N19/147 , H04N19/513 , H04N19/107 , H04N19/61 , H04N19/103 , H04N19/19
CPC classification number: H04N19/139 , H04N19/103 , H04N19/107 , H04N19/119 , H04N19/147 , H04N19/176 , H04N19/19 , H04N19/513 , H04N19/61
Abstract: To encode video data, a video encoder partitions a 2N×2N block of video data into four N×N blocks, determines encoding modes for each of the four N×N blocks, calculates values representative of encoded versions of the four N×N blocks using the encoding modes for each of the four N×N blocks, determines whether to skip testing of at least one non-square partitioning mode for the 2N×2N block based on the calculated values, and encodes the 2N×2N block based at least in part on the determination of whether to skip testing of the at least one non-square partitioning mode.
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公开(公告)号:US09883187B2
公开(公告)日:2018-01-30
申请号:US14737271
申请日:2015-06-11
Applicant: QUALCOMM Incorporated
Inventor: Chengjie Tu , Wei-Jung Chien , Xianglin Wang , Jaehong Chon , In Suk Chong , Marta Karczewicz , Woo-Shik Kim , Xin Zhao
IPC: H04N19/103 , H04N19/14 , H04N19/147 , H04N19/176 , H04N19/119 , H04N19/567 , H04N19/174 , H04N19/109 , H04N19/157
CPC classification number: H04N19/14 , H04N19/109 , H04N19/119 , H04N19/147 , H04N19/157 , H04N19/174 , H04N19/176 , H04N19/567
Abstract: A video encoding device comprises a memory configured to store video data and at least one processor configured to: select one of a full rate-distortion (RD) checking scheme or a fast RD checking scheme, determine an RD cost associated with encoding a block of the video data based on the selected full RD checking scheme or fast RD checking scheme, determine a partitioning scheme for the block based on the determined RD cost, and encode the block using the determined partitioning scheme based on the determined RD cost.
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公开(公告)号:US20160261861A1
公开(公告)日:2016-09-08
申请号:US14737252
申请日:2015-06-11
Applicant: QUALCOMM Incorporated
Inventor: Chengjie Tu , Wei-Jung Chien , Xianglin Wang , Jaehong Chon , In Suk Chong , Marta Karczewicz , Woo-Shik Kim , Xin Zhao
IPC: H04N19/103 , H04N19/567
CPC classification number: H04N19/14 , H04N19/109 , H04N19/119 , H04N19/147 , H04N19/157 , H04N19/174 , H04N19/176 , H04N19/567
Abstract: A video encoding device comprises a memory configured and at least one processor configured to: determine whether a metric meets a condition based on statistics, wherein the statistics are associated with a first video encoding mode checking order and a second video encoding mode checking order, responsive to determining that the metric meets the condition, select a first encoding mode checking order to encode the first block of video data responsive to determining that the condition is not met, select a second encoding mode checking order different from the first encoding mode checking order to encode the first block of video data, update the statistics based on the selected first or second encoding mode checking order, and encode a second block of video data, based on the updated statistics, and using the first or second mode checking order.
Abstract translation: 视频编码设备包括配置的存储器和至少一个处理器,其被配置为:确定度量是否满足基于统计的条件,其中所述统计与第一视频编码模式检查顺序和第二视频编码模式检查顺序相关联,响应 为了确定所述度量符合所述条件,响应于确定不满足所述条件,选择第一编码模式检查顺序以对所述第一视频数据块进行编码,选择与所述第一编码模式检查顺序不同的第二编码模式检查顺序 对视频数据的第一块进行编码,基于所选择的第一或第二编码模式检查顺序更新统计信息,并且基于更新的统计信息对第二块视频数据进行编码,并使用第一或第二模式检查顺序。
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公开(公告)号:US20130258049A1
公开(公告)日:2013-10-03
申请号:US13829774
申请日:2013-03-14
Applicant: QUALCOMM INCORPORATED
Inventor: In Suk Chong , Jaehong Chon , Marta Karczewicz
IPC: H04N7/26
CPC classification number: H04N19/70 , H04N19/117 , H04N19/174 , H04N19/176 , H04N19/80 , H04N19/82
Abstract: Systems, methods, and devices are disclosed that encode video, decode video, or both. These systems, methods, and devices generate and/or receive an enable syntax element in an encoded bitstream, wherein the enable syntax element indicates whether a loop filter is turned on or turned off for a group of video blocks. They also generate or receive one or more additional syntax elements identifying parameters for the loop filter for the group of video blocks in response to the enable syntax element indicating the loop filter is turned on for the group of video blocks. These systems, methods, and devices also perform the loop filter for the group of video blocks based on the received enable syntax element.
Abstract translation: 公开了对视频,解码视频或两者进行编码的系统,方法和设备。 这些系统,方法和设备在编码比特流中产生和/或接收启用语法元素,其中启用语法元素指示是否为一组视频块打开或关闭环路滤波器。 它们还响应于指示为视频块组接通环路滤波器的使能语法元素,生成或接收一个或多个附加语法元素,用于识别视频块组的环路滤波器的参数。 这些系统,方法和设备还基于接收到的使能语法元素对视频块组执行环路滤波器。
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6.
公开(公告)号:US20150163506A1
公开(公告)日:2015-06-11
申请号:US14099800
申请日:2013-12-06
Applicant: QUALCOMM Incorporated
Inventor: Jaehong Chon , In Suk Chong , Hariharan Ganesh Lalgudi , Xianglin Wang , Marta Karczewichz
IPC: H04N19/513 , H04N19/187
CPC classification number: H04N19/513 , H04N19/187 , H04N19/436 , H04N19/52
Abstract: A video coding device configured according to some aspects of this disclosure includes a memory configured to store a plurality of motion vector candidates. Each motion vector candidate can corresponding to at least one of a plurality of prediction units (PUs) partitioned in a parallel motion estimation region (MER). The video coding device also includes a processor in communication with the memory. The processor is configured to select a subset of the plurality of motion vector candidates to include in a merge candidate list. The selection can be based on a priority level of each motion vector candidate. The processor can be further configured to generate the merge candidate list to include the selected motion vector candidates.
Abstract translation: 根据本公开的一些方面配置的视频编码装置包括被配置为存储多个运动矢量候选的存储器。 每个运动矢量候选可以对应于在并行运动估计区域(MER)中分割的多个预测单元(PU)中的至少一个。 视频编码装置还包括与存储器通信的处理器。 处理器被配置为选择多个运动矢量候选的子集以包括在合并候选列表中。 该选择可以基于每个运动矢量候选的优先级。 处理器可以被进一步配置成生成合并候选列表以包括所选择的运动向量候选。
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公开(公告)号:US09591331B2
公开(公告)日:2017-03-07
申请号:US13829774
申请日:2013-03-14
Applicant: QUALCOMM Incorporated
Inventor: In Suk Chong , Jaehong Chon , Marta Karczewicz
IPC: H04N19/70 , H04N19/82 , H04N19/174 , H04N19/80 , H04N19/176 , H04N19/117
CPC classification number: H04N19/70 , H04N19/117 , H04N19/174 , H04N19/176 , H04N19/80 , H04N19/82
Abstract: Systems, methods, and devices are disclosed that encode video, decode video, or both. These systems, methods, and devices generate and/or receive an enable syntax element in an encoded bitstream, wherein the enable syntax element indicates whether a loop filter is turned on or turned off for a group of video blocks. They also generate or receive one or more additional syntax elements identifying parameters for the loop filter for the group of video blocks in response to the enable syntax element indicating the loop filter is turned on for the group of video blocks. These systems, methods, and devices also perform the loop filter for the group of video blocks based on the received enable syntax element.
Abstract translation: 公开了对视频,解码视频或两者进行编码的系统,方法和设备。 这些系统,方法和设备在编码比特流中产生和/或接收启用语法元素,其中启用语法元素指示是否为一组视频块打开或关闭环路滤波器。 响应于指示为视频块组接通环路滤波器的使能语法元素,它们还生成或接收一个或多个额外的语法元素,用于识别视频块组的环路滤波器的参数。 这些系统,方法和设备还基于接收到的使能语法元素对视频块组执行环路滤波器。
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公开(公告)号:US20160261870A1
公开(公告)日:2016-09-08
申请号:US14737271
申请日:2015-06-11
Applicant: QUALCOMM Incorporated
Inventor: Chengjie Tu , Wei-Jung Chien , Xianglin Wang , Jaehong Chon , In Suk Chong , Marta Karczewicz , Woo-Shik Kim , Xin Zhao
IPC: H04N19/147 , H04N19/14 , H04N19/174 , H04N19/176
CPC classification number: H04N19/14 , H04N19/109 , H04N19/119 , H04N19/147 , H04N19/157 , H04N19/174 , H04N19/176 , H04N19/567
Abstract: A video encoding device comprises a memory configured to store video data and at least one processor configured to: select one of a full rate-distortion (RD) checking scheme or a fast RD checking scheme, determine an RD cost associated with encoding a block of the video data based on the selected full RD checking scheme or fast RD checking scheme, determine a partitioning scheme for the block based on the determined RD cost, and encode the block using the determined partitioning scheme based on the determined RD cost.
Abstract translation: 视频编码装置包括:存储器,被配置为存储视频数据;以及至少一个处理器,被配置为:选择全速率失真(RD)检查方案或快速RD检查方案之一,确定与编码块 基于所选择的完整RD检查方案或快速RD检查方案的视频数据基于确定的RD成本确定块的分区方案,并且基于确定的RD成本使用确定的分区方案对块进行编码。
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9.
公开(公告)号:US09432685B2
公开(公告)日:2016-08-30
申请号:US14099800
申请日:2013-12-06
Applicant: QUALCOMM Incorporated
Inventor: Jaehong Chon , In Suk Chong , Hariharan Ganesh Lalgudi , Xianglin Wang , Marta Karczewicz
IPC: H04B1/66 , H04N19/513 , H04N19/187 , H04N19/52 , H04N19/436
CPC classification number: H04N19/513 , H04N19/187 , H04N19/436 , H04N19/52
Abstract: A video coding device configured according to some aspects of this disclosure includes a memory configured to store a plurality of motion vector candidates. Each motion vector candidate can corresponding to at least one of a plurality of prediction units (PUs) partitioned in a parallel motion estimation region (MER). The video coding device also includes a processor in communication with the memory. The processor is configured to select a subset of the plurality of motion vector candidates to include in a merge candidate list. The selection can be based on a priority level of each motion vector candidate. The processor can be further configured to generate the merge candidate list to include the selected motion vector candidates.
Abstract translation: 根据本公开的一些方面配置的视频编码装置包括被配置为存储多个运动矢量候选的存储器。 每个运动矢量候选可以对应于在并行运动估计区域(MER)中分割的多个预测单元(PU)中的至少一个。 视频编码装置还包括与存储器通信的处理器。 处理器被配置为选择多个运动矢量候选的子集以包括在合并候选列表中。 该选择可以基于每个运动矢量候选的优先级。 处理器可以被进一步配置成生成合并候选列表以包括所选择的运动向量候选。
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公开(公告)号:US09955186B2
公开(公告)日:2018-04-24
申请号:US14992820
申请日:2016-01-11
Applicant: QUALCOMM Incorporated
Inventor: Jaehong Chon , In Suk Chong , Xianglin Wang , Cheng-Teh Hsieh
IPC: H04N7/12 , G06K9/36 , H04N19/593 , H04N19/119 , H04N19/147 , H04N19/11 , H04N19/14
CPC classification number: H04N19/593 , H04N19/11 , H04N19/119 , H04N19/14 , H04N19/147
Abstract: An example method includes determining a respective variance value for pixels of each respective sub-block of at least four sub-blocks of a current block of video data of a particular block size; determining an average of the determined variance values for the at least four sub-blocks; determining a maximum difference value for the current block based on the average and the variance values for the at least four sub-blocks; determining whether pixels of the current block are homogeneous based on whether the maximum difference value for the current block satisfies a threshold difference value; and in response to determining that the pixels of the current block are homogeneous, selectively including block sizes that are greater than or equal to a threshold block size in a sub-set of block sizes to evaluate for use when intra encoding the pixels of the current block.
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