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公开(公告)号:US20200152690A1
公开(公告)日:2020-05-14
申请号:US16744010
申请日:2020-01-15
Inventor: Yusuke SAKATA , Mitsuyoshi MORI , Yutaka HIROSE , Hiroshi MASUDA , Hitoshi KURIYAMA , Ryohei MIYAGAWA
IPC: H01L27/148 , H01L27/146
Abstract: An imaging device includes: a photoelectric converter which converts light into signal charges; a charge accumulation region which is electrically connected to the photoelectric converter, and accumulates the signal charges; a transistor having a gate electrode which is electrically connected to the charge accumulation region; and a contact plug which electrically connects the photoelectric converter to the charge accumulation region, is in direct contact with the charge accumulation region, and comprises a semiconductor material.
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公开(公告)号:US20220310684A1
公开(公告)日:2022-09-29
申请号:US17840139
申请日:2022-06-14
Inventor: Yusuke SAKATA , Masaki TAMARU , Mitsuyoshi MORI
IPC: H01L27/146
Abstract: A solid-state image sensor includes pixel cells each of which is formed in and above a semiconductor substrate and that are arranged in each of a first direction and a second direction intersecting the first direction to form a two-dimensional array. The pixel cells include a first pixel cell and a second pixel cell arranged in the second direction, and the pixel circuit of the first pixel cell and the pixel circuit of the second pixel cell are adjacent to each other in the second direction between the photodetection portion of the first pixel cell and the photodetection portion of the second pixel cell. Each of the first transistors of the first pixel cell shares a gate electrode with the first transistor of the second pixel cell that has the same function as the first transistor of the first pixel cell.
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公开(公告)号:US20220014701A1
公开(公告)日:2022-01-13
申请号:US17486495
申请日:2021-09-27
Inventor: Tatsuya KABE , Hideyuki ARAI , Hisashi AIKAWA , Yuki SUGIURA , Akito INOUE , Mitsuyoshi MORI , Kentaro NAKANISHI , Yusuke SAKATA
IPC: H04N5/378 , H01L27/146 , H04N5/374
Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral circuit portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral circuit portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral circuit portion has an n-type MISFET provided at a p-well and an n-well provided to surround side and bottom portions of the p-well.
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公开(公告)号:US20180197905A1
公开(公告)日:2018-07-12
申请号:US15913106
申请日:2018-03-06
Inventor: Yusuke SAKATA , Manabu USUDA , Mitsuyoshi MORI , Yoshihisa KATO
IPC: H01L27/146 , H01L31/107 , H04N5/374
CPC classification number: H01L27/1463 , H01L27/14612 , H01L27/1464 , H01L27/14643 , H01L31/00 , H01L31/107 , H01L31/1075 , H04N5/369 , H04N5/374 , H04N5/378
Abstract: A solid-state imaging device includes a substrate of P type and a wiring layer. The substrate includes: a first semiconductor region disposed on a first principle surface and extending in a direction from the first principal surface toward the second principal surface; a second semiconductor region disposed between the second principal surface and the first semiconductor region and connected to the first semiconductor region; a P type semiconductor region disposed between the second principal surface and the second semiconductor regions of two pixels; and a pixel isolation region disposed inside the substrate, between the first semiconductor regions of the two pixels. The second semiconductor region and the P type semiconductor region form an avalanche multiplication region.
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公开(公告)号:US20150137199A1
公开(公告)日:2015-05-21
申请号:US14572046
申请日:2014-12-16
Inventor: Mitsuyoshi MORI , Ryohei MIYAGAWA , Yoshiyuki OHMORI , Yoshihiro SATO , Yutaka HIROSE , Yusuke SAKATA , Toru OKINO
IPC: H01L27/146
CPC classification number: H01L27/14636 , H01L27/1461 , H01L27/14612 , H01L27/1463 , H01L27/1464 , H01L27/14643 , H01L27/14645 , H01L27/307
Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.
Abstract translation: 根据本公开的固态成像装置包括:电荷存储区域,其在光电转换膜中存储通过光电转换获得的信号电荷; 放大晶体管,其放大存储在相应像素中的电荷存储区域中的信号电荷; 接触插塞,其电连接到电荷存储区域并且包含半导体材料; 以及设置在接触塞上方并包含半导体材料的线。 接触插塞和电荷存储区域电连接,并且放大晶体管的接触插塞和栅电极经由线电连接。
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公开(公告)号:US20230204415A1
公开(公告)日:2023-06-29
申请号:US18111131
申请日:2023-02-17
Inventor: Akito INOUE , Mitsuyoshi MORI , Yusuke SAKATA , Motonori ISHII
IPC: G01J1/44 , H03K17/687
CPC classification number: G01J1/44 , H03K17/6872 , G01J2001/4466
Abstract: A photodetector includes: at least one avalanche photodiode including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type; a first transistor connected to the first semiconductor layer and including a channel of the second conductivity type that has polarity opposite to polarity of the first conductivity type; and a second transistor connected to the first semiconductor layer and including a channel of the first conductivity type.
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公开(公告)号:US20220005855A1
公开(公告)日:2022-01-06
申请号:US17479846
申请日:2021-09-20
Inventor: Masaki TAMARU , Shigetaka KASUGA , Yusuke SAKATA , Mitsuyoshi MORI , Shinzo KOYAMA
IPC: H01L27/146
Abstract: A plurality of pixel cells are provided on a semiconductor substrate and arranged in a two-dimensional array. At least one of the plurality of pixel cells includes a light receiving part, a pixel circuit, and a second transistor. The light receiving part receives an incident light to generate an electrical charge. The pixel circuit includes first transistors arranged side by side along a first direction and a charge retention part that retains the electrical charge generated by the light receiving part. The pixel circuit outputs a light receiving signal in accordance with the electrical charge generated by the light receiving part. The second transistor connects the charge retention part to a memory part that stores the electrical charge. Seen along a thickness direction of the semiconductor substrate, the second transistor is apart from the first transistors in a second direction orthogonal to the first direction.
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公开(公告)号:US20190013349A1
公开(公告)日:2019-01-10
申请号:US16109473
申请日:2018-08-22
Inventor: Yusuke SAKATA , Mitsuyoshi MORI , Yutaka HIROSE , Hiroshi MASUDA , Hitoshi KURIYAMA , Ryohei MIYAGAWA
IPC: H01L27/148 , H01L27/146 , H01L21/768 , H01L23/485
CPC classification number: H01L27/14806 , H01L21/76886 , H01L23/485 , H01L27/1463 , H01L27/14643 , H01L27/14665 , H01L2924/00 , H01L2924/0002
Abstract: A solid-state imaging device includes: a first electrode formed above a semiconductor substrate; a photoelectric conversion film formed on the first electrode and for converting light into signal charges; a second electrode formed on the photoelectric conversion film; a charge accumulation region electrically connected to the first electrode and for accumulating the signal charges converted from the light by the photoelectric conversion film; a reset gate electrode for resetting the charge accumulation region; an amplification transistor for amplifying the signal charges accumulated in the charge accumulation region; and a contact plug in direct contact with the charge accumulation region, comprising a semiconductor material, and for electrically connecting to each other the first electrode and the charge accumulation region.
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公开(公告)号:US20170170226A1
公开(公告)日:2017-06-15
申请号:US15441568
申请日:2017-02-24
Inventor: Mitsuyoshi MORI , Ryohei MIYAGAWA , Yoshiyuki OHMORI , Yoshihiro SATO , Yutaka HIROSE , Yusuke SAKATA , Toru OKINO
IPC: H01L27/146
CPC classification number: H01L27/14636 , H01L27/1461 , H01L27/14612 , H01L27/1463 , H01L27/1464 , H01L27/14643 , H01L27/14645 , H01L27/307
Abstract: A solid-state imaging device according to the present disclosure includes: a charge storage region that stores a signal charge obtained through photoelectric conversion in a photoelectric conversion film; an amplification transistor that amplifies the signal charge stored in the charge storage region in a corresponding pixel; a contact plug that is electrically connected to the charge storage region and contains a semiconductor material; and a line that is disposed above the contact plug and contains a semiconductor material. The contact plug and the charge storage region are electrically connected, and the contact plug and a gate electrode of the amplification transistor are electrically connected via the line.
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公开(公告)号:US20240121530A1
公开(公告)日:2024-04-11
申请号:US18541932
申请日:2023-12-15
Inventor: Tatsuya KABE , Hideyuki ARAI , Hisashi AIKAWA , Yuki SUGIURA , Akito INOUE , Mitsuyoshi MORI , Kentaro NAKANISHI , Yusuke SAKATA
IPC: H04N25/75 , H01L27/146 , H04N25/766
CPC classification number: H04N25/75 , H01L27/14612 , H01L27/14636 , H01L27/14643 , H04N25/766
Abstract: A light detector is configured such that a light receiving portion having APDs and a peripheral portion are provided on a first principal surface of a p-type semiconductor substrate, and further includes a back electrode provided on a second principal surface of the semiconductor substrate and a p-type first separation portion provided between the light receiving portion and the peripheral portion. The APD has, on a first principal surface side, an n-type region and a p-epitaxial layer contacting the n-type region in a Z-direction. The peripheral portion has an n-type MISFET provided at a p-well and an n-well provided to surround entire side and bottom portions of the p-well.
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