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公开(公告)号:US20250056027A1
公开(公告)日:2025-02-13
申请号:US18926018
申请日:2024-10-24
Inventor: Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Kiyofumi ABE , Tadamasa TOMA , Takahiro NISHI
IPC: H04N19/44 , H04N19/119 , H04N19/137 , H04N19/159 , H04N19/176
Abstract: An image decoder has circuitry coupled to a memory. The circuitry splits a current image block into a plurality of partitions. The circuitry predicts a first motion vector from a set of uni-prediction motion vector candidates for a first partition of the plurality of partitions, and decodes the first partition using the first motion vector.
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公开(公告)号:US20250039395A1
公开(公告)日:2025-01-30
申请号:US18911807
申请日:2024-10-10
Inventor: Ru Ling LIAO , Chong Soon LIM , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/137 , H04N19/105 , H04N19/119 , H04N19/132 , H04N19/159 , H04N19/176
Abstract: An image encoder or decoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, predicts a first set of samples for a first partition of a current picture with one or more motion vectors including a first motion vector and predicts a second set of samples for a first portion of the first partition with one or more motion vectors from a second partition different from the first partition. The samples of the first set of samples of the first portion of the first partition and of the second set of samples of the first portion of the first partition are weighted. A motion vector for the first portion of the first partition is stored which is based on one or both of the first motion vector and the second motion vector. The first partition is encoded or decoded using at least the weighted samples of the first portion of the first partition.
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公开(公告)号:US20250030869A1
公开(公告)日:2025-01-23
申请号:US18909662
申请日:2024-10-08
Inventor: Ru Ling LIAO , Chong Soon LIM , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/137 , H04N19/105 , H04N19/119 , H04N19/132 , H04N19/159 , H04N19/176
Abstract: An image encoder or decoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, predicts a first set of samples for a first partition of a current picture with one or more motion vectors including a first motion vector and predicts a second set of samples for a first portion of the first partition with one or more motion vectors from a second partition different from the first partition. The samples of the first set of samples of the first portion of the first partition and of the second set of samples of the first portion of the first partition are weighted. A motion vector for the first portion of the first partition is stored which is based on one or both of the first motion vector and the second motion vector. The first partition is encoded or decoded using at least the weighted samples of the first portion of the first partition.
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公开(公告)号:US20240406381A1
公开(公告)日:2024-12-05
申请号:US18799023
申请日:2024-08-09
Inventor: Takahiro NISHI , Tadamasa TOMA , Kiyofumi ABE
IPC: H04N19/105 , H04N19/15
Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry switches between storing and not storing of a decoded picture buffer (DPB) parameter related to a DPB in a common header shared between layers in layer groups each including at least one output layer, according to whether or not all the layer groups in a bitstream each include only one layer.
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公开(公告)号:US20240397110A1
公开(公告)日:2024-11-28
申请号:US18795488
申请日:2024-08-06
Inventor: Virginie DRUGEON , Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Yusuke KATO
IPC: H04N19/70 , H04N19/132 , H04N19/167 , H04N19/186
Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry determines whether or not a current video to be processed is a progressive video. When it is determined that the current video is a progressive video, the encoder encodes, into a bitstream, one syntax element indicating a chroma location type which is information indicating locations of chroma samples relative to luma samples for a frame included in the current video. When it is determined that the current video is not a progressive video, the encoder encodes two syntax elements into the bitstream, each of which indicates the chroma location type for a different one of fields of two types included in the current video.
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公开(公告)号:US20240380919A1
公开(公告)日:2024-11-14
申请号:US18779516
申请日:2024-07-22
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/52 , H04N19/137 , H04N19/176 , H04N19/186
Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: derives an average value of motion vector values of two prediction candidates in a prediction candidate list for a merge mode, and registers the average value derived as new motion vector information of a new prediction candidate into the prediction candidate list; and derives new correction processing information regarding correction processing of a prediction image, and registers the new correction processing information derived into the prediction candidate list in association with the new motion vector information.
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公开(公告)号:US20240373046A1
公开(公告)日:2024-11-07
申请号:US18775630
申请日:2024-07-17
Inventor: Virginie DRUGEON , Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Yusuke KATO
IPC: H04N19/30 , H04N19/103 , H04N19/157 , H04N19/169 , H04N19/70
Abstract: An encoder includes: memory; and circuitry coupled to the memory and configured to generate an encoded bitstream. In the encoder, when a multi-layer structure is to be included in the encoded bitstream to be generated, the circuitry generates the encoded bitstream by including in the encoded bitstream (i) a sequence parameter set that refers to a video parameter set and (ii) a network abstraction layer (NAL) unit having a layer identification (ID) greater than zero in the multi-layer structure, and when the multi-layer structure is not to be included in the encoded bitstream to be generated, the circuitry generates the encoded bitstream by including in the encoded bitstream a sequence parameter set that does not refer to the video parameter set.
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公开(公告)号:US20240373023A1
公开(公告)日:2024-11-07
申请号:US18773863
申请日:2024-07-16
Inventor: Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Yusuke KATO
IPC: H04N19/126 , H04N19/159 , H04N19/176 , H04N19/61
Abstract: Provided is an encoder including: circuitry; and memory coupled to the circuitry, in which the circuitry: derives a prediction residual indicating a difference between a current block and a prediction image of the current block; performs primary transform on the prediction residual, and performs secondary transform on a result of the primary transform; performs quantization on a result of the secondary transform; and encodes a result of the quantization. In the performing of the secondary transform, when a matrix weighted intra prediction included in intra prediction and having prediction modes is used, the circuitry uses, as a transform set for the secondary transform, a common transform set shared among the prediction modes. The matrix weighted intra prediction generates the prediction image by performing matrix calculation on a pixel sequence obtained from pixel values of surrounding pixels of the current block.
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公开(公告)号:US20240364880A1
公开(公告)日:2024-10-31
申请号:US18764812
申请日:2024-07-05
Inventor: Ryuichi KANOH , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/117 , H04N19/103 , H04N19/176 , H04N19/182
CPC classification number: H04N19/117 , H04N19/103 , H04N19/176 , H04N19/182
Abstract: Various embodiments provide a decoder configured to select a filter based on a block size of a first block and a block size of a second block in an image, and change values of pixels in the first block and the second block. The filter includes a first set of multipliers and a first set of offsets for the first block, and a second set of multipliers and a second set of offsets for the second block. The values of the pixels in the first block and the second block are changed by performing multiplication with each multiplier in the first set of multipliers, by performing multiplication with each multiplier in the second set of multipliers, and by using the first set of offsets and the second set of offsets.
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公开(公告)号:US20240259551A1
公开(公告)日:2024-08-01
申请号:US18606492
申请日:2024-03-15
Inventor: Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Yusuke KATO
IPC: H04N19/103 , H04N19/186 , H04N19/60 , H04N19/70
CPC classification number: H04N19/103 , H04N19/186 , H04N19/60 , H04N19/70
Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: determines whether an image format of a video is a format including a chroma component; when it is determined that the image format is a format including a chroma component, signals a flag indicating whether application of JCCR is allowed or not in a header of a stream, and (i) encodes the video with application of the JCCR allowed, or (ii) encodes the video with application of the JCCR not allowed; and when it is determined that the image format is a format including no chroma component, signals no flag indicating whether application of the JCCR is allowed or not in the header of the stream, and encodes the video with application of the JCCR not allowed.
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