公开(公告)号：US09669567B2

公开(公告)日：2017-06-06

申请号：US14446660

申请日：2014-07-30

Applicant: PANASONIC CORPORATION

Inventor： Tsuyoshi Takeda ,  Hiromitsu Takashita ,  Keiko Kashihara ,  Shingo Yoshioka

IPC: H01L21/768 ,  B29C41/20 ,  B32B37/12 ,  H01L23/00 ,  B29K101/00 ,  B29C39/10 ,  H01L21/56 ,  H01L23/31

CPC classification number: B29C41/20 ,  B29C39/10 ,  B29K2101/00 ,  B32B37/12 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/12042 ,  H01L2924/3511 ,  H01L2924/00

Abstract: The present invention relates to a manufacturing method of a molded article, including: a molded article forming step of forming a molded article by curing a resin composition on a main surface, on the side of a bendable first supporting medium, of a laminated supporting medium obtained by laminating the first supporting medium and a second supporting medium that is harder than the first supporting medium; a second-supporting medium peeling step of peeling the second supporting medium from the first supporting medium after the molded article forming step; and a first-supporting medium peeling step of peeling the first supporting medium from the molded article while bending the first supporting medium after the second-supporting medium peeling step. The shape of the first supporting medium can be maintained at a curing temperature at which the resin composition is cured in the molded article forming step.

公开(公告)号：US20140191406A1

公开(公告)日：2014-07-10

申请号：US14235766

申请日：2012-10-18

Applicant: PANASONIC CORPORATION

Inventor： Hiromitsu Takashita ,  Tsuyoshi Takeda ,  Keiko Kashihara ,  Hiroaki Fujiwara ,  Shingo Yoshioka

IPC: H01L21/768 ,  H01L23/48 ,  H01L21/56

CPC classification number: H01L21/76877 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/02311 ,  H01L2224/0236 ,  H01L2224/02379 ,  H01L2224/033 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/19 ,  H01L2224/2101 ,  H01L2224/2105 ,  H01L2224/96 ,  H01L2924/0001 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00

Abstract: One aspect of the present invention resides in a manufacturing method for a semiconductor package, including a covering step of forming a covering insulating layer that covers the surface of a semiconductor element, a film-forming step of forming a resin film on the surface of the covering insulating layer, a circuit pattern-forming step of forming a circuit pattern portion including recesses reaching the surfaces of electrodes of the semiconductor element and a circuit groove having a desired shape and a desired depth, a catalyst-depositing step of depositing a plating catalyst or a precursor thereof on the surface of the circuit pattern portion, a film-separating step of separating the resin film from the covering insulating layer, and a plating processing step of forming a circuit electrically connected to the electrodes, by applying electroless plating to the covering insulating layer, from which the resin film is separated.

Abstract translation: 本发明的一个方面在于一种半导体封装的制造方法，包括形成覆盖半导体元件表面的覆盖绝缘层的覆盖步骤，在该表面上形成树脂膜的成膜步骤 覆盖绝缘层的电路图案形成步骤，形成包括到达半导体元件的电极表面的凹部的电路图案部分和具有期望形状和期望深度的电路槽的电路图案形成步骤，沉积镀催化剂的催化剂沉积步骤 或其前体在电路图案部分的表面上，将分离树脂膜与覆盖绝缘层分离的膜分离步骤，以及电镀处理步骤，形成电连接到电极的电路，通过将化学镀施加到 覆盖绝缘层，树脂膜从中分离。

公开(公告)号：US09082825B2

公开(公告)日：2015-07-14

申请号：US14235766

申请日：2012-10-18

Applicant: PANASONIC CORPORATION

Inventor： Hiromitsu Takashita ,  Tsuyoshi Takeda ,  Keiko Kashihara ,  Hiroaki Fujiwara ,  Shingo Yoshioka

IPC: H01L21/00 ,  H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/498 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L21/76877 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/02311 ,  H01L2224/0236 ,  H01L2224/02379 ,  H01L2224/033 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/1411 ,  H01L2224/19 ,  H01L2224/2101 ,  H01L2224/2105 ,  H01L2224/96 ,  H01L2924/0001 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/18162 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00

Abstract: One aspect of the present invention resides in a manufacturing method for a semiconductor package, including a covering step of forming a covering insulating layer that covers the surface of a semiconductor element, a film-forming step of forming a resin film on the surface of the covering insulating layer, a circuit pattern-forming step of forming a circuit pattern portion including recesses reaching the surfaces of electrodes of the semiconductor element and a circuit groove having a desired shape and a desired depth, a catalyst-depositing step of depositing a plating catalyst or a precursor thereof on the surface of the circuit pattern portion, a film-separating step of separating the resin film from the covering insulating layer, and a plating processing step of forming a circuit electrically connected to the electrodes, by applying electroless plating to the covering insulating layer, from which the resin film is separated.

Abstract translation: 本发明的一个方面在于一种半导体封装的制造方法，包括形成覆盖半导体元件表面的覆盖绝缘层的覆盖步骤，在该表面上形成树脂膜的成膜步骤 覆盖绝缘层的电路图案形成步骤，形成包括到达半导体元件的电极表面的凹部的电路图案部分和具有期望形状和期望深度的电路槽的电路图案形成步骤，沉积镀催化剂的催化剂沉积步骤 或其前体在电路图案部分的表面上，将分离树脂膜与覆盖绝缘层分离的膜分离步骤，以及电镀处理步骤，形成电连接到电极的电路，通过将化学镀施加到 覆盖绝缘层，树脂膜从中分离。

公开(公告)号：US20140182903A1

公开(公告)日：2014-07-03

申请号：US14232862

申请日：2012-07-13

Applicant: PANASONIC CORPORATION

Inventor： Takashi Sagara ,  Hidetaka Kakiuchi ,  Keiko Kashihara ,  Yuki Kitai ,  Hirosuke Saito ,  Daisuke Yokoyama ,  Hiroaki Fujiwara

IPC: C09D171/00 ,  H05K1/03 ,  C08L71/00

CPC classification number: C09D171/00 ,  B32B15/08 ,  B32B2457/08 ,  C08G59/3218 ,  C08G59/38 ,  C08G59/42 ,  C08G59/5073 ,  C08J5/24 ,  C08J2371/12 ,  C08J2463/00 ,  C08K5/18 ,  C08K5/3445 ,  C08K5/5399 ,  C08L71/00 ,  C08L71/12 ,  H05K1/0326 ,  H05K1/0353 ,  H05K1/0366 ,  Y10T428/31529 ,  C08L63/00

Abstract: An object is to provide a resin composition that has excellent dielectric properties, that yields a highly heat-resistant cured product, that provides a low viscosity when made into a varnish, and that has a high Tg and a high flame retardancy without containing halogen. The resin composition contains a polyarylene ether copolymer (A) that has an intrinsic viscosity, measured in methylene chloride at 25° C., of 0.03 to 0.12 dL/g and that has an average of 1.5 to 3 phenolic hydroxyl groups in molecular terminal position per molecule, a triphenylmethane-type epoxy resin (B) that has a softening point of 50 to 70° C., and a cure accelerator (C), wherein the content of the polyarylene ether copolymer (A) is 60 to 85 mass parts where the total of the polyarylene ether copolymer (A) and the epoxy resin (B) is 100 mass parts.

Abstract translation: 本发明的目的是提供一种具有优异的介电性能的树脂组合物，其产生高耐热固化产物，其在制成清漆时提供低粘度，并且在不含卤素的情况下具有高Tg和高阻燃性。 树脂组合物含有在二氯甲烷中在25℃下测定的特性粘度为0.03〜0.12dL / g的聚亚芳基醚共聚物（A），在分子末端位置具有平均1.5〜3个酚羟基 软化点为50〜70℃的三苯甲烷型环氧树脂（B）和固化促进剂（C），聚亚芳基醚共聚物（A）的含量为60〜85质量份 其中聚芳醚醚共聚物（A）和环氧树脂（B）的总量为100质量份。