公开(公告)号：US20240154300A1

公开(公告)日：2024-05-09

申请号：US18496975

申请日：2023-10-30

Applicant: NXP B.V.

Inventor： Harshitha Thippur Shivamurthy ,  Rabia Syeda ,  Rocío Gabriela Molina Moreno ,  Cristine Aguila Badiao ,  Pieter Lok ,  Adrianus Buijsman ,  Leo van Gemert ,  Maarten Lont ,  Giorgio Carluccio ,  Antonius Johannes Matheus de Graauw

IPC: H01Q1/38 ,  H01Q1/22

CPC classification number: H01Q1/38 ,  H01Q1/2283

Abstract: A system comprising: a waveguide assembly comprising a plurality of waveguides, the plurality of waveguides comprising at least a first waveguide and a second waveguide, and an integrated circuit package, IC package, comprising a plurality of launchers to one or more of transmit signalling to and receive signalling from a respective one of the plurality of waveguides, wherein the waveguide assembly comprises a surface configured to be coupled to the IC package and each of the plurality of waveguides comprises an opening in the surface configured to be aligned with its respective launcher, and wherein each of the openings has a major dimension and a minor dimension, wherein the major dimension is larger than the minor dimension, and wherein the major dimension of at least the opening of the first waveguide is oriented perpendicular to the major dimension of the opening of the second waveguide.

公开(公告)号：US20230318552A1

公开(公告)日：2023-10-05

申请号：US18194141

申请日：2023-03-31

Applicant: NXP B.V.

Inventor： Peter van der Cammen ,  Marcel Wenting ,  Maarten Lont

IPC: H03F3/45

CPC classification number: H03F3/45475 ,  H03F3/45932 ,  H03F2203/45082

Abstract: Disclosed is a four-phase generation circuit, comprising a pair of input ports configured to receive a differential signal having a common mode voltage; a polyphase filter having a pair of polyphase filter input ports and first, second, third and fourth output ports; a first circuit configured to provide the differential signal with an adjusted common mode voltage to the pair of polyphase filter input ports; wherein the first, second third and fourth output ports are each configured to output a square-wave signal, with 90° phase separation between consecutive output signals; and a feedback circuit from the first, second, third and fourth outputs ports to the first circuit; wherein the feedback circuit is configured to provide a feedback signal to the first circuit to set the adjusted common mode voltage from the common mode voltage.

公开(公告)号：US10788569B2

公开(公告)日：2020-09-29

申请号：US15907501

申请日：2018-02-28

Applicant: NXP B.V.

Inventor： Yu Lin ,  Maarten Lont

IPC: G01S7/40 ,  G01S13/931 ,  G01S13/32 ,  G01S13/10 ,  G01S13/34 ,  G01S7/02 ,  G01S13/87 ,  G01S7/42 ,  G01S7/03 ,  G01S7/285 ,  G01S7/35 ,  G01S13/86 ,  G01S13/02

Abstract: A reconfigurable radar unit is described that includes: a millimetre wave (mmW) transceiver (Tx/Rx) circuit; a mixed analog and baseband integrated circuit; and a signal processor circuit. The mmW Tx/Rx circuit and mixed analog and baseband integrated circuit and signal processor circuit are configured to support a plurality of radar operational modes. a radar sensitivity monitor and architecture reconfiguration control unit (260) is coupled to the signal processor circuit and is configured to monitor a radar performance and, in response thereto, initiate a change in the radar operational mode. In this manner, a large number of radar operational modes is supported and can be dynamically adopted by the reconfigurable radar unit dependent upon any prevailing radar performance condition.

公开(公告)号：US11742130B2

公开(公告)日：2023-08-29

申请号：US16449673

申请日：2019-06-24

Applicant: NXP B.V.

Inventor： Lukas Frederik Tiemeijer ,  Bartholomeus Wilhelmus Christiaan Hovens ,  Maarten Lont

IPC: H01L27/28 ,  H01F27/28 ,  H01L23/522 ,  H01L23/528 ,  H01L23/66 ,  H01L49/02 ,  H03F3/21 ,  H03F3/45

CPC classification number: H01F27/2804 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/66 ,  H01L28/10 ,  H03F3/21 ,  H03F3/45269 ,  H01F2027/2809

Abstract: An integrated circuit transformer (150) is formed with a primary winding (91) located in at least a first winding layer having a first thickness, a secondary winding (92) located in at least the first winding layer and having a first center point at the first side of the transformer and two secondary terminals at a second, opposite side of the transformer, and a first center tap feed line (81) located along a symmetry axis of the transformer in an upper metal layer having a second thickness that is at least equivalent to the first thickness of the first winding layer, wherein the first center tap feed line has a direct electrical connection to the first center point in the secondary winding.