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    MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
    1.
    发明申请
    MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
    存储器件及其制造方法

    公开(公告)号：US20140131716A1

    公开(公告)日：2014-05-15

    申请号：US13744594

    申请日：2013-01-18

    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES

    Inventor： Jia-Min Shieh ,  Yu-Chung Lien ,  Wen-Hsien Huang ,  Chang-Hong Shen ,  Min-Cheng Chen ,  Ci-Ling Pan

    IPC: H01L29/792

    CPC classification number: H01L29/66825 ,  B82Y40/00 ,  H01L29/40114 ,  H01L29/42332 ,  H01L29/7881 ,  Y10S977/774

    Abstract: A memory device comprises a substrate, a tunnel oxide layer, a charge trapping layer, a block oxide layer, a plurality of conductive quantum dots, a metal gate and a source/drain structure. The tunnel oxide layer is disposed on the substrate and has a thickness substantially less than or equal to 2 nm. The charge trapping layer is disposed on the tunnel oxide layer. The quantum dots are embedded in the charge trapping layer. The block oxide layer is disposed on the charge trapping layer. The metal gate essentially consisting of aluminum (Al), copper (Cu), tantalum nitride (TiN), titanium nitride (TaN), aluminum-silicon-copper (Al—Si—Cu) alloys or the arbitrary combinations thereof is disposed on the block oxide layer. The source/drain structure is disposed in the substrate.

    Abstract translation: 存储器件包括衬底，隧道氧化物层，电荷俘获层，块状氧化物层，多个导电量子点，金属栅极和源极/漏极结构。 隧道氧化物层设置在基板上，其厚度基本上小于或等于2nm。 电荷捕获层设置在隧道氧化物层上。 量子点嵌入电荷俘获层中。 块状氧化物层设置在电荷俘获层上。 基本上由铝（Al），铜（Cu），氮化钽（TiN），氮化钛（TaN），铝 - 硅 - 铜（Al-Si-Cu）合金或其任意组合组成的金属栅极设置在 块状氧化物层。 源极/漏极结构设置在衬底中。

    Transistor device structure that includes polycrystalline semiconductor thin film that has large grain size
    5.
    发明授权
    Transistor device structure that includes polycrystalline semiconductor thin film that has large grain size 有权
    晶体管器件结构包括晶粒尺寸大的多晶半导体薄膜

    公开(公告)号：US09455350B2

    公开(公告)日：2016-09-27

    申请号：US14224503

    申请日：2014-03-25

    Applicant: National Applied Research Laboratories

    Inventor： Jia-Min Shieh ,  Wen-Hsien Huang ,  Chang-Hong Shen ,  Chih-Chao Yang ,  Tung-Ying Hsieh

    IPC: H01L29/786 ,  H01L27/088 ,  H01L29/04 ,  H01L27/12 ,  H01L21/822 ,  H01L27/06

    CPC classification number: H01L29/78678 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/1203 ,  H01L27/1222 ,  H01L29/04 ,  H01L29/78603 ,  H01L29/78675

    Abstract: A transistor device structure includes a substrate, a first polycrystalline semiconductor thin film and a first transistor unit. The first polycrystalline semiconductor thin film is disposed on the substrate. A grain diameter of the first polycrystalline semiconductor thin film is greater than 1 micrometer and a thickness of the first polycrystalline semiconductor thin film is less than three hundredths of the grain diameter. The first transistor unit is disposed on the first polycrystalline semiconductor thin film and includes a first gate dielectric layer and a first gate structure. The first gate dielectric layer is disposed on a surface of the first polycrystalline thin film semiconductor. The first gate structure is disposed on a surface of the first gate dielectric layer.

    Abstract translation: 晶体管器件结构包括衬底，第一多晶半导体薄膜和第一晶体管单元。 第一多晶半导体薄膜设置在基板上。 第一多晶半导体薄膜的晶粒直径大于1微米，第一多晶半导体薄膜的厚度小于晶粒直径的百分之三十。 第一晶体管单元设置在第一多晶半导体薄膜上，并且包括第一栅极介电层和第一栅极结构。 第一栅介质层设置在第一多晶薄膜半导体的表面上。 第一栅极结构设置在第一栅极介电层的表面上。

    Transistor device structure
    6.
    发明授权
    Transistor device structure 有权
    晶体管器件结构

    公开(公告)号：US09281305B1

    公开(公告)日：2016-03-08

    申请号：US14561377

    申请日：2014-12-05

    Applicant: National Applied Research Laboratories

    Inventor： Chih-Chao Yang ,  Jia-Min Shieh ,  Wen-Hsien Huang ,  Tung-Ying Hsieh ,  Chang-Hong Shen ,  Szu-Hung Chen

    IPC: H01L27/06 ,  H01L27/12 ,  H01L29/16 ,  H01L29/04 ,  H01L29/08 ,  H01L29/24 ,  H01L29/786 ,  H01L29/417 ,  H01L21/8238

    CPC classification number: H01L27/0688 ,  H01L21/823814 ,  H01L27/1203 ,  H01L29/04 ,  H01L29/0847 ,  H01L29/1606 ,  H01L29/24 ,  H01L29/41783 ,  H01L29/78648 ,  H01L29/78684 ,  H01L29/78696

    Abstract: A transistor device structure includes a substrate, a first transistor layer and a second transistor layer. The second transistor layer is disposed between the substrate and the first transistor layer. The first transistor layer includes an insulating structure and a first transistor unit. The insulating structure is disposed on the second transistor layer and has a protruding portion. The first transistor unit includes a gate structure, a source/drain structure, an embedded source/drain structure and a channel. The source/drain structure is disposed beside the gate structure and over the insulating structure. The embedded source/drain structure is disposed underneath the source/drain structure and in the insulating structure. The channel is defined between the protruding portion and the gate structure.

    Abstract translation: 晶体管器件结构包括衬底，第一晶体管层和第二晶体管层。 第二晶体管层设置在衬底和第一晶体管层之间。 第一晶体管层包括绝缘结构和第一晶体管单元。 绝缘结构设置在第二晶体管层上并具有突出部分。 第一晶体管单元包括栅极结构，源极/漏极结构，嵌入式源极/漏极结构和沟道。 源极/漏极结构设置在栅极结构旁边和绝缘结构之上。 嵌入式源极/漏极结构设置在源极/漏极结构下方和绝缘结构中。 通道限定在突出部分和栅极结构之间。

    Method for fabricating power-generating module with solar cell
    7.
    发明授权
    Method for fabricating power-generating module with solar cell 有权
    用太阳能电池制造发电模块的方法

    公开(公告)号：US09040333B2

    公开(公告)日：2015-05-26

    申请号：US14075472

    申请日：2013-11-08

    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES

    Inventor： Jia-Min Shieh ,  Chang-Hong Shen ,  Wen-Hsien Huang ,  Bau-Tong Dai ,  Jung Y. Huang ,  Hao-Chung Kuo

    IPC: H01L31/062 ,  H01L27/142

    CPC classification number: H01L27/142 ,  H01L31/03926 ,  H01L31/075 ,  H01L31/18 ,  Y02E10/548

    Abstract: The invention discloses a method for fabricating power-generating module with solar cell. The method includes the steps of providing a flexible substrate; forming a solar cell unit on the flexible substrate by using a high density plasma at a temperature lower than about 150° C.; and forming a circuit unit on the flexible substrate; wherein the solar cell unit is coupled to the circuit unit, so as to provide the power needed for the operation of the circuit unit.

    Abstract translation: 本发明公开了一种用于制造具有太阳能电池的发电模块的方法。 该方法包括提供柔性基板的步骤; 通过使用低于约150℃的高密度等离子体在柔性基板上形成太阳能电池单元; 以及在所述柔性基板上形成电路单元; 其中所述太阳能电池单元耦合到所述电路单元，以便提供所述电路单元的操作所需的功率。

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