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公开(公告)号:US20210225740A1
公开(公告)日:2021-07-22
申请号:US17267709
申请日:2018-12-27
Applicant: Mitsubishi Electric Corporation
Inventor: Hiroya SANNAI , Kei HAYASHI , Yosuke NAKATA , Tatsuya KAWASE , Yuji IMOTO
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: A semiconductor device according to the disclosure includes a first semiconductor chip, a second semiconductor chip, a first metal plate provided on an upper surface of the first semiconductor chip, a second metal plate provided on an upper surface of the second semiconductor chip and a sealing resin covering the first semiconductor chip, the second semiconductor chip, the first metal plate and the second metal plate, wherein a groove is formed in the sealing resin, the groove extending downwards from an upper surface of the sealing resin, the first metal plate includes, at an end facing the second metal plate, a first exposed portion exposed from a side face of the sealing resin forming the groove, and the second metal plate includes, at an end facing the first metal plate, a second exposed portion exposed from a side face of the sealing resin forming the groove.
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公开(公告)号:US20160104651A1
公开(公告)日:2016-04-14
申请号:US14754167
申请日:2015-06-29
Applicant: Mitsubishi Electric Corporation
Inventor: Shinsuke ASADA , Naoki YOSHIMATSU , Yuji IMOTO , Yusuke ISHIYAMA , Junji FUJINO
IPC: H01L23/28 , H01L23/498
CPC classification number: H01L23/49827 , H01L23/057 , H01L23/24 , H01L23/295 , H01L23/3735 , H01L23/49811 , H01L24/37 , H01L24/40 , H01L25/072 , H01L2224/29111 , H01L2224/32225 , H01L2224/33181 , H01L2224/37011 , H01L2224/371 , H01L2224/37124 , H01L2224/37147 , H01L2224/37599 , H01L2224/40095 , H01L2224/45124 , H01L2224/48247 , H01L2224/73213 , H01L2224/73215 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265 , H01L2224/83801 , H01L2224/84801 , H01L2924/13055 , H01L2924/181 , H01L2924/01047 , H01L2924/01029 , H01L2924/01051 , H01L2924/00012 , H01L2924/00014
Abstract: A power semiconductor device includes an insulating substrate, a semiconductor element, a case, and a wiring member. The case forms a container body having a bottom surface defined by a surface of the insulating substrate, to which said semiconductor element is bonded. The wiring member has a bonding portion positioned above an upper surface electrode of the semiconductor element. The bonding portion of the wiring member is provided with a projection portion projecting toward the upper surface electrode of the semiconductor element and bonded to the upper surface electrode with a solder, and a through hole passing through the bonding portion in a thickness direction through the projection portion.
Abstract translation: 功率半导体器件包括绝缘衬底,半导体元件,壳体和布线构件。 壳体形成具有由绝缘基板的表面限定的底表面的容器主体,所述半导体元件与该绝缘基板的表面接合。 布线构件具有位于半导体元件的上表面电极上方的接合部。 布线部件的接合部分设置有突出部分,该突出部分朝向半导体元件的上表面电极突出并且用焊料接合到上表面电极,并且通孔穿过接合部分沿着厚度方向穿过突起 一部分。
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3.
公开(公告)号:US20160099224A1
公开(公告)日:2016-04-07
申请号:US14754141
申请日:2015-06-29
Applicant: MITSUBISHI ELECTRIC CORPORATION
Inventor: Naoki YOSHIMATSU , Yusuke ISHIYAMA , Taketoshi SHIKANO , Yuji IMOTO , Junji FUJINO , Shinsuke ASADA
IPC: H01L23/00
CPC classification number: H01L24/48 , H01L23/057 , H01L24/45 , H01L24/83 , H01L24/84 , H01L24/85 , H01L25/072 , H01L2224/37599 , H01L2224/40137 , H01L2224/45124 , H01L2224/48472 , H01L2224/73221 , H01L2924/00014 , H01L2924/13055 , H01L2924/00 , H01L2224/37099 , H01L2224/05599 , H01L2224/85399
Abstract: A semiconductor device according to the present invention includes an insulating substrate having a circuit pattern, semiconductor elements bonded on the circuit pattern with a brazing material, and a wiring terminal bonded with a brazing material on an electrode provided on each of the semiconductor elements on an opposite side of the circuit pattern, in which a part of the wiring terminal is in contact with the insulating substrate, and insulated from the circuit pattern.
Abstract translation: 根据本发明的半导体器件包括具有电路图案的绝缘基板,用钎焊材料接合在电路图案上的半导体元件和在每个半导体元件上设置在电极上的钎焊材料的接线端子 电路图案的相对侧,其中布线端子的一部分与绝缘基板接触并且与电路图案绝缘。
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4.
公开(公告)号:US20150061098A1
公开(公告)日:2015-03-05
申请号:US14222402
申请日:2014-03-21
Applicant: Mitsubishi Electric Corporation
Inventor: Yuji IMOTO , Naoki YOSHIMATSU , Junji FUJINO
IPC: H01L23/495 , H01L21/50
CPC classification number: H01L23/495 , H01L21/50 , H01L23/043 , H01L23/24 , H01L23/3735 , H01L23/49861 , H01L24/00 , H01L24/33 , H01L2224/37147 , H01L2224/37599 , H01L2224/40137 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
Abstract: A semiconductor device includes a conductive portion having semiconductor elements provided on a substrate, a case housing the conductive portion, and a lead terminal integrated into the case to be directly connected to the semiconductor elements or an interconnection of the substrate. The lead terminal has a stress relief shape for reliving stress generated in the lead terminal.
Abstract translation: 半导体器件包括具有设置在衬底上的半导体元件的导电部分,容纳导电部分的壳体,以及集成到壳体中以直接连接到半导体元件的引线端子或衬底的互连。 引线端子具有用于再生引线端子中产生的应力的应力消除形状。
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公开(公告)号:US20220285254A1
公开(公告)日:2022-09-08
申请号:US17632503
申请日:2019-10-17
Applicant: Mitsubishi Electric Corporation
Inventor: Atsushi MAEDA , Tatsuya KAWASE , Yuji IMOTO
IPC: H01L23/498 , H01L21/52
Abstract: A semiconductor device includes a semiconductor element and a lead part. The semiconductor element is mounted on a circuit pattern provided on an insulating substrate. The lead part has a plate shape and is bonded to the semiconductor element with a first bonding material interposed therebetween. The lead part includes a lead body and a bonding component. The lead body includes an opening part provided corresponding to a mounting position of the semiconductor element. The bonding component is provided in the opening part and on the semiconductor element. The bonding component is bonded at a lower surface thereof to the semiconductor element by the first bonding material and bonded at an outer peripheral part thereof to an inner periphery of the opening part by a second bonding material.
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公开(公告)号:US20200098701A1
公开(公告)日:2020-03-26
申请号:US16472097
申请日:2017-02-09
Applicant: Mitsubishi Electric Corporation
Inventor: Hiroyuki HARADA , Naoki YOSHIMATSU , Osamu USUI , Yuji IMOTO , Yuki YOSHIOKA
IPC: H01L23/00 , H01L23/047 , H01L23/31 , H01L23/495
Abstract: A semiconductor chip (6) is disposed on the insulation substrate (2). A lead frame (8) is bonded to an upper surface of the semiconductor chip (6). A sealing resin (12) covers the semiconductor chip (6), the insulation substrate (2), and the lead frame (8). A stress mitigation resin (13) having a lower elastic modulus than that of the sealing resin (12) is partially applied to an end of the lead frame (8).
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公开(公告)号:US20180294253A1
公开(公告)日:2018-10-11
申请号:US15766903
申请日:2016-01-29
Applicant: Mitsubishi Electric Corporation
Inventor: Hiroshi YOSHIDA , Yuji IMOTO , Hidetoshi ISHIBASHI , Daisuke MURATA , Kenta NAKAHARA , Seiji Oka , Junji FUJINO , Nobuhiro ASAJI
IPC: H01L25/07 , H01L25/18 , H01L23/492 , C09D163/00 , B32B27/38
CPC classification number: H01L25/072 , B32B27/38 , C09D163/00 , H01L23/4924 , H01L25/07 , H01L25/18
Abstract: A semiconductor device includes semiconductor chips fixed to a board, an insulating plate having a through-hole formed therein, a first lower conductor including a lower main body formed on the lower surface of the insulating plate and soldered to any of the semiconductor chips, and a lower protrusion portion that connects with the lower main body, and extends to the outside of the insulating plate, a second lower conductor formed on a lower surface of the insulating plate and soldered to any of the semiconductor chips, an upper conductor including an upper main body formed on the upper surface of the insulating plate, and an upper protrusion portion that connects with the upper main body and extends to the outside of the insulating plate, and a connection portion provided in the through-hole and connects the upper main body and the second lower conductor.
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公开(公告)号:US20160111379A1
公开(公告)日:2016-04-21
申请号:US14790682
申请日:2015-07-02
Applicant: Mitsubishi Electric Corporation
Inventor: Yusuke ISHIYAMA , Yuji IMOTO , Junji FUJINO , Shinsuke ASADA , Mikio ISHIHARA
IPC: H01L23/00 , H01L23/495 , H01L23/31 , H01L23/29
CPC classification number: H01L23/562 , H01L23/293 , H01L23/3107 , H01L23/3121 , H01L23/4952 , H01L23/49524 , H01L23/49551 , H01L23/49575 , H01L23/49838 , H01L24/37 , H01L24/40 , H01L2224/05554 , H01L2224/37124 , H01L2224/37147 , H01L2224/37599 , H01L2224/40137 , H01L2224/48091 , H01L2224/73221 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2224/45099
Abstract: A semiconductor device includes a semiconductor element having a lower surface bonded to an insulating substrate side, and a plate-shaped lead terminal bonded to an upper surface of the semiconductor element, and having a horizontally extending portion. The horizontally extending portion in the lead terminal is bonded to the semiconductor element and includes a linearly extending portion in a planar view. The semiconductor device further includes a sealing resin that seals the semiconductor element together with the linearly extending portion in the lead terminal. A linear expansion coefficient of the sealing resin shows a value intermediate between a linear expansion coefficient of the lead terminal and a linear expansion coefficient of the semiconductor element, and the lead terminal includes a recess or a projection to horizontally and partially separate the linearly extending portion into parts.
Abstract translation: 半导体器件包括具有与绝缘基板侧接合的下表面的半导体元件和与半导体元件的上表面接合并具有水平延伸部的板状引线端子。 引线端子中的水平延伸部分结合到半导体元件并且在平面图中包括线性延伸部分。 半导体器件还包括密封树脂,其将半导体元件与引线端子中的线性延伸部分一起密封。 密封树脂的线膨胀系数显示在引线端子的线膨胀系数和半导体元件的线膨胀系数之间的中间值,并且引线端子包括凹部或突起,以水平和部分地分开线性延伸部分 进入零件。
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公开(公告)号:US20220278004A1
公开(公告)日:2022-09-01
申请号:US17627171
申请日:2019-11-27
Applicant: Mitsubishi Electric Corporation
Inventor: Hiroya SANNAI , Seiichiro INOKUCHI , Yuji IMOTO , Arata IIZUKA
IPC: H01L23/10 , H01L23/047
Abstract: An insulating substrate (2) is provided on a base plate (1). A semiconductor device (6-9) is provided on the insulating substrate (2). A case (10) is arranged to surround the insulating substrate and the semiconductor device and bonded to the base plate (1) with an adhesive (11). A sealant (22) seals the insulating substrate and the semiconductor device in the case (10). A groove (23) is provided on a lower surface of the case (10) opposing an upper surface peripheral portion of the base plate (1). A bottom surface of the groove (23) has a protruding part (24) protruding toward the base plate (1). The protruding part (24) includes a vertex (25) and gradients (26,27) respectively provided on an inner side and on an outer side of the case (10) with the vertex (25) sandwiched therebetween. The adhesive (11) contacts the vertex (25) and is housed in the groove (23).
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10.
公开(公告)号:US20200321306A1
公开(公告)日:2020-10-08
申请号:US16492517
申请日:2017-06-22
Applicant: Mitsubishi Electric Corporation
Inventor: Takumi SHIGEMOTO , Satoru ISHIKAWA , Yuji IMOTO
IPC: H01L23/00 , H02M7/00 , H02M7/44 , H01L25/07 , H01L23/047 , H01L23/373 , H01L25/00
Abstract: The semiconductor device includes a semiconductor element substrate having an insulation property, and a wire for positioning the semiconductor element with respect to the semiconductor element substrate. The semiconductor element substrate includes a disposition region for disposing the semiconductor element. The wire is provided at least at a part of the periphery of the disposition region.
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