公开(公告)号：US08705267B2

公开(公告)日：2014-04-22

申请号：US13307060

申请日：2011-11-30

Applicant: Masami Endo ,  Takuro Ohmaru

Inventor： Masami Endo ,  Takuro Ohmaru

IPC: G11C11/24 ,  G11C11/00 ,  G11C11/34 ,  G11C8/00

CPC classification number: H03K3/356008 ,  H03K3/012 ,  H03K21/023 ,  H03K21/403

Abstract: An integrated circuit which can be switched to a resting state and can be returned from the resting state rapidly is provided. An integrated circuit whose power consumption can be reduced without the decrease in operation speed is provided. A method for driving the integrated circuit is provided. The integrated circuit includes a first flip-flop and a second flip-flop including a nonvolatile memory circuit. In an operating state in which power is supplied, the first flip-flop retains data. In a resting state in which supply of power is stopped, the second flip-flop retains data. On transition from the operating state into the resting state, the data is transferred from the first flip-flop to the second flip-flop. On return from the resting state to the operating state, the data is transferred from the second flip-flop to the first flip-flop.

公开(公告)号：US08575985B2

公开(公告)日：2013-11-05

申请号：US13341412

申请日：2011-12-30

Applicant: Takuro Ohmaru ,  Masami Endo

Inventor： Takuro Ohmaru ,  Masami Endo

IPC: H03K3/356

CPC classification number: H01L27/1052 ,  G06F1/3275 ,  G11C11/24 ,  G11C14/0009 ,  G11C19/184 ,  H01L23/5226 ,  H01L27/0629 ,  H01L27/108 ,  H01L27/10805 ,  H01L27/10897 ,  H01L28/20 ,  H01L28/40 ,  H01L29/24 ,  H01L29/26 ,  H01L29/7869 ,  Y02D10/13 ,  Y02D10/14

Abstract: A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read.

公开(公告)号：US20120140550A1

公开(公告)日：2012-06-07

申请号：US13307060

申请日：2011-11-30

Applicant: Masami Endo ,  Takuro Ohmaru

Inventor： Masami Endo ,  Takuro Ohmaru

IPC: G11C11/24 ,  G11C11/00

CPC classification number: H03K3/356008 ,  H03K3/012 ,  H03K21/023 ,  H03K21/403

Abstract: An integrated circuit which can be switched to a resting state and can be returned from the resting state rapidly is provided. An integrated circuit whose power consumption can be reduced without the decrease in operation speed is provided. A method for driving the integrated circuit is provided. The integrated circuit includes a first flip-flop and a second flip-flop including a nonvolatile memory circuit. In an operating state in which power is supplied, the first flip-flop retains data. In a resting state in which supply of power is stopped, the second flip-flop retains data. On transition from the operating state into the resting state, the data is transferred from the first flip-flop to the second flip-flop. On return from the resting state to the operating state, the data is transferred from the second flip-flop to the first flip-flop.

Abstract translation: 提供一种可以切换到静止状态并且可以从静止状态快速返回的集成电路。 提供一种能够在不降低运行速度的情况下降低功耗的集成电路。 提供了一种用于驱动集成电路的方法。 集成电路包括第一触发器和包括非易失性存储器电路的第二触发器。 在提供电力的操作状态下，第一触发器保持数据。 在停止供电的静止状态下，第二触发器保持数据。 在从操作状态转变到静止状态时，数据从第一触发器传送到第二触发器。 从静止状态返回到工作状态时，数据从第二触发器传送到第一触发器。

公开(公告)号：US20120170355A1

公开(公告)日：2012-07-05

申请号：US13341412

申请日：2011-12-30

Applicant: Takuro Ohmaru ,  Masami Endo

Inventor： Takuro Ohmaru ,  Masami Endo

IPC: G11C11/24

CPC classification number: H01L27/1052 ,  G06F1/3275 ,  G11C11/24 ,  G11C14/0009 ,  G11C19/184 ,  H01L23/5226 ,  H01L27/0629 ,  H01L27/108 ,  H01L27/10805 ,  H01L27/10897 ,  H01L28/20 ,  H01L28/40 ,  H01L29/24 ,  H01L29/26 ,  H01L29/7869 ,  Y02D10/13 ,  Y02D10/14

Abstract: A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read.

Abstract translation: 提供能够抑制功耗的信号处理电路。 在不向存储元件提供电源电压的期间中，存储在与非易失性存储器相对应的第一存储电路中的数据可以由设置在第二存储电路中的第一电容器保持。 通过使用在氧化物半导体层中形成沟道的晶体管，保持在第一电容器中的信号被保持很长时间。 因此，存储元件也可以在停止供给电源电压的期间保持存储的内容（数据）。 可以将由第一电容器保持的信号转换为与第二晶体管的状态（导通状态或截止状态）对应的信号，并从第二存储电路读取。 因此，可以准确地读取原始信号。

公开(公告)号：US08860738B2

公开(公告)日：2014-10-14

申请号：US12639233

申请日：2009-12-16

Applicant: Masami Endo

Inventor： Masami Endo

IPC: G06T1/00 ,  G06T15/00 ,  G09G5/36 ,  G09G5/39 ,  G09G3/20

CPC classification number: G09G3/20 ,  G09G5/39 ,  G09G2360/12

Abstract: An object is to provide an image processing circuit adaptable to displays having a variety of pixel numbers. The image processing circuit includes a data adjustment circuit, a first line memory and a second line memory capable of storing K pieces of data, an output timing control circuit, and an arithmetic circuit. To the data adjustment circuit, (X×Y) pieces of pixel data are input. Y pieces of pixel data are transmitted to the first line memory. When Y is less than K, (K−Y) pieces of dummy data are added to fill the first line memory. Then, the K pieces of data are output from the first line memory to the second line memory and a new set of K data is input to the first line memory. The arithmetic circuit stores the data input from the line memories and performs filtering.

Abstract translation: 目的在于提供一种适用于具有各种像素数的显示器的图像处理电路。 图像处理电路包括能够存储K个数据的数据调整电路，第一行存储器和第二行存储器，输出定时控制电路和运算电路。 向数据调整电路输入（X×Y）个像素数据。 将Y个像素数据发送到第一行存储器。 当Y小于K时，（K-Y）个虚拟数据被添加以填充第一行存储器。 然后，将K个数据从第一行存储器输出到第二行存储器，并将一组新的K个数据输入到第一行存储器。 算术电路存储从行存储器输入的数据并执行滤波。

公开(公告)号：US08427280B2

公开(公告)日：2013-04-23

申请号：US13177583

申请日：2011-07-07

Applicant: Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue

Inventor： Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Masami Endo ,  Hiroki Dembo ,  Daisuke Kawae ,  Takayuki Inoue

IPC: H04Q5/22

CPC classification number: G06K19/07749

Abstract: In a case where an ASK method is used for a communication method between a semiconductor device and a reader/writer, the amplitude of a radio signal is changed by data transmitted from the semiconductor device to the reader/writer when data is not transmitted from the reader/writer to the semiconductor device. Therefore, in some cases, the semiconductor device mistakes data transmitted from the semiconductor device itself for data transmitted from the reader/writer to the semiconductor device. The semiconductor device includes an antenna circuit, a transmission circuit, a reception circuit, and an arithmetic processing circuit. The antenna circuit transmits and receives a radio signal. The transmission circuit outputs to the reception circuit a signal showing whether or not the antenna circuit is transmitting the radio signal.

Abstract translation: 在使用ASK方式进行半导体装置与读取器/写入器之间的通信方式的情况下，通过从半导体装置发送到读取器/写入器的数据，无线信号的振幅由数据不从 读取器/写入器到半导体器件。 因此，在某些情况下，半导体器件将从半导体器件本身发送的数据错误地从读取器/写入器发送到半导体器件的数据。 半导体器件包括天线电路，发送电路，接收电路和运算处理电路。 天线电路发送和接收无线电信号。 发送电路向接收电路输出表示天线电路是否正在发送无线信号的信号。

公开(公告)号：US20120311365A1

公开(公告)日：2012-12-06

申请号：US13477192

申请日：2012-05-22

Applicant: Seiichi Yoneda ,  Jun Koyama ,  Yutaka Shionoiri ,  Masami Endo ,  Hiroki Dembo ,  Tatsuji Nishijima ,  Hidetomo Kobayashi ,  Kazuaki Ohshima

Inventor： Seiichi Yoneda ,  Jun Koyama ,  Yutaka Shionoiri ,  Masami Endo ,  Hiroki Dembo ,  Tatsuji Nishijima ,  Hidetomo Kobayashi ,  Kazuaki Ohshima

IPC: G06F1/32

CPC classification number: H03K19/173 ,  G06F1/3243 ,  G06F3/0679 ,  H03K19/17772 ,  Y02D10/152

Abstract: An object is to provide a programmable logic device configured to keep a connection state of logic circuits even while power supply voltage is stopped. The programmable logic device includes arithmetic circuits each of whose logic state can be changed; a configuration changing circuit changing the logic states of the arithmetic circuits; a power supply control circuit controlling supply of power supply voltage to the arithmetic circuits; a state memory circuit storing data on the logic states and data on states of the power supply voltage of the arithmetic circuits; and an arithmetic state control circuit controlling the configuration changing circuit and the power supply control circuit in accordance with the data stored in the state memory circuit. A transistor in which a channel formation region is formed in an oxide semiconductor layer is provided between the configuration changing circuit and each of the arithmetic circuits.

Abstract translation: 目的是提供一种可编程逻辑器件，其被配置为即使在电源电压停止时仍保持逻辑电路的连接状态。 可编程逻辑器件包括可以改变其逻辑状态的运算电路; 配置改变电路改变运算电路的逻辑状态; 电源控制电路，控制对所述运算电路的电源电压供给; 存储关于逻辑状态的数据的状态存储电路和关于运算电路的电源电压的状态的数据; 以及算术状态控制电路，根据存储在状态存储电路中的数据控制配置改变电路和电源控制电路。 在配置改变电路和每个运算电路之间设置有在氧化物半导体层中形成沟道形成区的晶体管。

公开(公告)号：US20120294080A1

公开(公告)日：2012-11-22

申请号：US13472549

申请日：2012-05-16

Applicant: Masami Endo

Inventor： Masami Endo

IPC: G11C11/40

CPC classification number: G11C11/4085 ,  G11C8/12 ,  G11C29/12005 ,  G11C29/26 ,  G11C2029/1206

Abstract: A memory device according to the invention can be operated with a single potential, by which the use of a voltage converter can be excluded, leading to the reduction of power consumption. Such an operation can be achieved by utilizing capacitive coupling of a capacitor connected to a gate of a transistor for data writing. That is, the capacitive coupling is induced by inputting a signal, which is supplied by a delay circuit configured to delay a write signal having a potential equal to the power supply potential, to the capacitor. Increase in the potential of the gate by the capacitive coupling allows the transistor to be turned on in association with the power supply potential applied to the gate from a power supply. Data is written by inputting a signal having a potential equal to the power supply potential or a grounded potential to a node through the transistor.

Abstract translation: 根据本发明的存储器件可以以单个电位工作，通过该电位可以排除使用电压转换器，导致功耗的降低。 这种操作可以通过利用连接到晶体管的栅极的电容器进行数据写入的电容耦合来实现。 也就是说，通过输入由延迟电路提供的信号来感应电容耦合，该延迟电路被配置为将具有等于电源电位的电位的写入信号延迟到电容器。 通过电容耦合增加栅极的电位使晶体管与从电源施加到栅极的电源电位相关联地导通。 通过晶体管将具有等于电源电位的电位或接地电位的信号输入到节点来写入数据。

公开(公告)号：US08261999B2

公开(公告)日：2012-09-11

申请号：US12943591

申请日：2010-11-10

Applicant: Takayuki Ikeda ,  Yoshiyuki Kurokawa ,  Masami Endo

Inventor： Takayuki Ikeda ,  Yoshiyuki Kurokawa ,  Masami Endo

IPC: G06K19/06

CPC classification number: G06K19/07749 ,  G06F1/189 ,  G06F1/26

Abstract: A semiconductor device such as an RFID, which can easily generate a given stable potential, is provided. Circuits included in a semiconductor device are categorized depending on whether a given stable power source potential is necessary. A power source potential generated from a wireless signal received by an antenna with the use of the antenna and a rectifier circuit is supplied to a circuit which needs a given stable power source potential through a regulator. On the other hand, a power source potential generated by the rectifier circuit is supplied to a circuit other than the circuit which needs the arbitrary power source potential. Thus, a semiconductor device including a regulator circuit easily designed with a smaller layout can be provided, and the semiconductor device can easily generate a given stable power source potential.

Abstract translation: 提供了诸如RFID的半导体器件，其可以容易地产生给定的稳定电位。 包括在半导体器件中的电路根据是否需要给定的稳定电源电位进行分类。 由使用天线和整流电路由天线接收的无线信号产生的电源电位通过调节器提供给需要给定稳定电源电位的电路。 另一方面，由整流电路产生的电源电位被供给到需要任意电源电位的电路以外的电路。 因此，可以提供包括容易设计成具有较小布局的调节器电路的半导体器件，并且半导体器件可以容易地产生给定的稳定的电源电位。

公开(公告)号：US08004510B2

公开(公告)日：2011-08-23

申请号：US12959667

申请日：2010-12-03

Applicant: Masami Endo

Inventor： Masami Endo

IPC: G06F3/038

CPC classification number: G09G3/3275 ,  G09G5/399 ,  G09G2360/18

Abstract: An object is to realize downsizing and cost reduction of a display device by efficiently using a physical region of a memory in a control circuit of the display device. A structure of a video data storage portion of the control circuit is that provided with a video data storage portion for storing video data of an n-th frame (n is a natural number), a video data storage portion for storing video data of an (n+1)th frame, and a video data storage portion for sharing video data of the n-th frame and the (n+1)th frame among received video data.

Abstract translation: 目的是通过有效地使用显示装置的控制电路中的存储器的物理区域来实现显示装置的小型化和降低成本。 控制电路的视频数据存储部分的结构是设置有用于存储第n帧（n是自然数）的视频数据的视频数据存储部分，用于存储第n帧的视频数据的视频数据存储部分 （n + 1）帧，以及用于共享所接收的视频数据中的第n帧和第（n + 1）帧的视频数据的视频数据存储部分。