公开(公告)号：US20120228728A1

公开(公告)日：2012-09-13

申请号：US13399475

申请日：2012-02-17

申请人： Makoto UEKI ,  Naoya Inoue ,  Yoshihiro Hayashi

发明人： Makoto UEKI ,  Naoya Inoue ,  Yoshihiro Hayashi

IPC分类号： H01L29/82 ,  H01L21/8246

CPC分类号： H01L43/12 ,  H01L27/228 ,  H01L43/08

摘要： A semiconductor device in which MRAM is formed in a wiring layer A contained in a multilayered wiring layer, the MRAM having at least two first magnetization pinning layers in contact with a first wiring formed in a wiring layer and insulated from each other, a free magnetization layer overlapping the two first magnetization pinning layers in a plan view, and connected with the first magnetization pinning layers, a non-magnetic layer situated over the free magnetization layer, and a second magnetization pinning layer situated over the non-magnetic layer.

摘要翻译： 一种半导体器件，其中在包含在多层布线层中的布线层A中形成MRAM，所述MRAM具有与形成在布线层中并彼此绝缘的第一布线接触的至少两个第一磁化闭塞层，自由磁化 层在平面图中与两个第一磁化钉扎层重叠，并与第一磁化钉扎层，位于自由磁化层上方的非磁性层和位于非磁性层上的第二磁化钉扎层连接。

公开(公告)号：US08558334B2

公开(公告)日：2013-10-15

申请号：US13399475

申请日：2012-02-17

申请人： Makoto Ueki ,  Naoya Inoue ,  Yoshihiro Hayashi

发明人： Makoto Ueki ,  Naoya Inoue ,  Yoshihiro Hayashi

IPC分类号： H01L29/82 ,  H01L23/552 ,  H01L27/08 ,  H01L21/00

CPC分类号： H01L43/12 ,  H01L27/228 ,  H01L43/08

摘要： A semiconductor device in which MRAM is formed in a wiring layer A contained in a multilayered wiring layer, the MRAM having at least two first magnetization pinning layers in contact with a first wiring formed in a wiring layer and insulated from each other, a free magnetization layer overlapping the two first magnetization pinning layers in a plan view, and connected with the first magnetization pinning layers, a non-magnetic layer situated over the free magnetization layer, and a second magnetization pinning layer situated over the non-magnetic layer.

摘要翻译： 一种半导体器件，其中MRAM形成在包含在多层布线层中的布线层A中，所述MRAM具有与形成在布线层中并彼此绝缘的第一布线接触的至少两个第一磁化闭塞层，自由磁化 层在平面图中与两个第一磁化钉扎层重叠，并与第一磁化钉扎层，位于自由磁化层上方的非磁性层和位于非磁性层上的第二磁化钉扎层连接。

公开(公告)号：US20100025852A1

公开(公告)日：2010-02-04

申请号：US12518688

申请日：2007-12-20

申请人： Makoto Ueki ,  Hironori Yamamoto ,  Yoshihiro Hayashi ,  Fuminori Ito ,  Yoshiyuki Fukumoto

发明人： Makoto Ueki ,  Hironori Yamamoto ,  Yoshihiro Hayashi ,  Fuminori Ito ,  Yoshiyuki Fukumoto

IPC分类号： H01L23/48 ,  H01L21/312 ,  H01L21/768

CPC分类号： H01L21/31633 ,  C23C16/30 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/3122 ,  H01L21/31695 ,  H01L21/76807 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76849 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： To suppress deterioration in reliability of wiring and to reduce effective dielectric constant of wiring. In a semiconductor device, copper-containing wirings are covered by barrier insulating films, and the barrier insulating films contain a component of an organic silica containing unsaturated hydrocarbon and amorphous carbon. The copper-containing wirings are covered by the barrier insulating films that contain a component that is in an organic silica structure containing unsaturated hydrocarbon and amorphous carbon. Accordingly, inter-wiring capacitance is reduced without deteriorating reliability of the copper-containing wiring, thereby realizing a high-speed LSI with low power consumption.

摘要翻译： 抑制布线可靠性的劣化，降低布线的有效介电常数。 在半导体器件中，含铜布线被阻挡绝缘膜覆盖，隔离绝缘膜含有含有不饱和烃和无定形碳的有机二氧化硅的成分。 含铜配线被含有含有不饱和烃和无定形碳的有机二氧化硅结构的成分的阻隔绝缘膜覆盖。 因此，在不劣化含铜布线的可靠性的情况下降低布线间电容，从而实现低功耗的高速LSI。

公开(公告)号：US08492266B2

公开(公告)日：2013-07-23

申请号：US13302348

申请日：2011-11-22

申请人： Makoto Ueki ,  Takahiro Onodera ,  Yoshihiro Hayashi

发明人： Makoto Ueki ,  Takahiro Onodera ,  Yoshihiro Hayashi

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L23/5329 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/31633 ,  H01L21/31695 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.

摘要翻译： 提供了一种半导体器件，其包括形成在半导体衬底上的层间绝缘膜，填充在形成于层间绝缘膜中的凹部中的布线层和帽绝缘膜。 层间绝缘膜包括第一SiOCH膜和包括通过改性第一SiOCH膜的表面层形成的SiOCH膜的表面改性层，具有比第一SiOCH膜具有更低的碳浓度和更高的氧浓度的SiOCH膜具有。 盖绝缘膜与金属布线和表面改性层的表面接触。

公开(公告)号：US08080878B2

公开(公告)日：2011-12-20

申请号：US12557677

申请日：2009-09-11

申请人： Makoto Ueki ,  Takahiro Onodera ,  Yoshihiro Hayashi

发明人： Makoto Ueki ,  Takahiro Onodera ,  Yoshihiro Hayashi

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L23/5329 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/31633 ,  H01L21/31695 ,  H01L21/7682 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.

摘要翻译： 提供了一种半导体器件，其包括形成在半导体衬底上的层间绝缘膜，填充在形成于层间绝缘膜中的凹部中的布线层和帽绝缘膜。 层间绝缘膜包括第一SiOCH膜和包括通过改性第一SiOCH膜的表面层形成的SiOCH膜的表面改性层，具有比第一SiOCH膜具有更低的碳浓度和更高的氧浓度的SiOCH膜具有。 盖绝缘膜与金属布线和表面改性层的表面接触。

公开(公告)号：US20090014887A1

公开(公告)日：2009-01-15

申请号：US12160149

申请日：2007-01-05

申请人： Hiroto Ohtake ,  Munehiro Tada ,  Makoto Ueki ,  Yoshihiro Hayashi

发明人： Hiroto Ohtake ,  Munehiro Tada ,  Makoto Ueki ,  Yoshihiro Hayashi

IPC分类号： H01L21/768 ,  H01L23/522

CPC分类号： H01L23/53295 ,  H01L21/76802 ,  H01L21/76808 ,  H01L21/76813 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： In an insulating film structure having a barrier insulating film, a via interlayer insulating film, a wiring interlayer insulating film, and a hard mask film stacked in this order on an underlayer wiring, a via hole pattern is formed in the insulating film structure, then a groove pattern is formed in the hard mask film, and a grove is formed in the insulating film structure using this as a mask. According to the prior art, the via side wall is oxidized equally severely in the both processes. The trench side wall is oxidized severely in the via first process according to the prior art, whereas, according to the present invention, the oxidation thereof is suppressed to such an extent that an almost non-oxidized state can be created.

摘要翻译： 在具有阻挡绝缘膜，通孔层间绝缘膜，布线层间绝缘膜和硬掩模膜的绝缘膜结构中，依次层叠在下层布线上，在绝缘膜结构中形成通孔图案，然后， 在硬掩模膜中形成凹槽图案，并且使用其作为掩模在绝缘膜结构中形成凹槽。 根据现有技术，通孔侧壁在两个过程中同样严重氧化。 在根据现有技术的通孔第一工艺中，沟槽侧壁被严重氧化，而根据本发明，其氧化被抑制到几乎可以产生几乎非氧化状态的程度。

公开(公告)号：US20100096756A1

公开(公告)日：2010-04-22

申请号：US12522814

申请日：2008-01-08

申请人： Masayoshi Tagami ,  Yoshihiro Hayashi ,  Munehiro Tada ,  Takahiro Onodera ,  Naoya Furutake ,  Makoto Ueki ,  Mari Amano

发明人： Masayoshi Tagami ,  Yoshihiro Hayashi ,  Munehiro Tada ,  Takahiro Onodera ,  Naoya Furutake ,  Makoto Ueki ,  Mari Amano

IPC分类号： H01L23/52 ,  H01L21/768

CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/7684 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76858 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has a multilayer interconnection including a copper interconnection film formed in a predetermined area within an insulating film, a liner film, and a high-melting-point metal film. The copper interconnection film is polycrystalline, and crystal grains occupying 40% or more of an area of a unit interconnection surface among crystal grains forming the polycrystal are oriented to (111) in a substrate thickness direction. The copper interconnection film has crystal conformity with the noble metal liner film. In a case where the high-melting-point metal film is formed of Ti and the noble metal liner film is a Ru film, the high-melting-point metal of Ti dissolves into Ru in a solid state to form the noble metal liner. Thus, a copper interconnection is formed with both of Cu diffusion barrier characteristics and Cu crystal conformity.

摘要翻译： 半导体器件具有包括形成在绝缘膜内的预定区域中的铜互连膜，衬里膜和高熔点金属膜的多层互连。 铜互连膜是多晶的，并且占据形成多晶体的晶粒中的单位互连表面的面积的40％以上的晶粒在基板厚度方向上取向为（111）。 铜互连膜与贵金属衬垫膜具有晶体一致性。 在高熔点金属膜由Ti形成并且贵金属衬垫膜是Ru膜的情况下，Ti的高熔点金属以固态溶解到Ru中以形成贵金属衬垫。 因此，铜互连形成为Cu扩散阻挡特性和Cu晶体一致性。

公开(公告)号：US07545040B2

公开(公告)日：2009-06-09

申请号：US10538306

申请日：2003-09-22

申请人： Makoto Ueki ,  Masayuki Hiroi ,  Nobuyuki Ikarashi ,  Yoshihiro Hayashi

发明人： Makoto Ueki ,  Masayuki Hiroi ,  Nobuyuki Ikarashi ,  Yoshihiro Hayashi

IPC分类号： H01L23/48

CPC分类号： H01L23/53233 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.

摘要翻译： 布线金属含有铜（Cu）作为主要元素的多晶体和除Cu以外的附加元素，并且附加元素的浓度在构成Cu多晶体并且在晶界附近的晶界处高于 晶粒内部的晶粒。 附加元素优选为选自Ti，Zr，Hf，Cr，Co，Al，Sn，Ni，Mg和Ag中的至少一种元素。 该Cu布线通过形成Cu多晶膜形成，在该Cu膜上形成附加元素层，并将该附加元素从附加元素层扩散到Cu膜中。 作为用于半导体器件的金属布线，该布线用铜合金是优选的。

公开(公告)号：US20060113685A1

公开(公告)日：2006-06-01

申请号：US10538306

申请日：2003-09-22

申请人： Makoto Ueki ,  Masayuki Hiroi ,  Nobuyuki Ikarashi ,  Yoshihiro Hayashi

发明人： Makoto Ueki ,  Masayuki Hiroi ,  Nobuyuki Ikarashi ,  Yoshihiro Hayashi

IPC分类号： H01L23/48

CPC分类号： H01L23/53233 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.

公开(公告)号：US08198730B2

公开(公告)日：2012-06-12

申请号：US12522814

申请日：2008-01-08

申请人： Masayoshi Tagami ,  Yoshihiro Hayashi ,  Munehiro Tada ,  Takahiro Onodera ,  Naoya Furutake ,  Makoto Ueki ,  Mari Amano

发明人： Masayoshi Tagami ,  Yoshihiro Hayashi ,  Munehiro Tada ,  Takahiro Onodera ,  Naoya Furutake ,  Makoto Ueki ,  Mari Amano

IPC分类号： H01L23/52

CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/7684 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76858 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has a multilayer interconnection including a copper interconnection film formed in a predetermined area within an insulating film, a liner film, and a high-melting-point metal film. The copper interconnection film is polycrystalline, and crystal grains occupying 40% or more of an area of a unit interconnection surface among crystal grains forming the polycrystal are oriented to (111) in a substrate thickness direction. The copper interconnection film has crystal conformity with the noble metal liner film. In a case where the high-melting-point metal film is formed of Ti and the noble metal liner film is a Ru film, the high-melting-point metal of Ti dissolves into Ru in a solid state to form the noble metal liner. Thus, a copper interconnection is formed with both of Cu diffusion barrier characteristics and Cu crystal conformity.

摘要翻译： 半导体器件具有包括形成在绝缘膜内的预定区域中的铜互连膜，衬里膜和高熔点金属膜的多层互连。 铜互连膜是多晶的，并且占据形成多晶体的晶粒中的单位互连表面的面积的40％以上的晶粒在基板厚度方向上取向为（111）。 铜互连膜与贵金属衬垫膜具有晶体一致性。 在高熔点金属膜由Ti形成并且贵金属衬垫膜是Ru膜的情况下，Ti的高熔点金属以固态溶解到Ru中以形成贵金属衬垫。 因此，铜互连形成为Cu扩散阻挡特性和Cu晶体一致性。