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    Systems and methods for enhanced local iteration randomization in a data decoder
    1.
    发明授权
    Systems and methods for enhanced local iteration randomization in a data decoder 有权
    用于数据解码器中增强的局部迭代随机化的系统和方法

    公开(公告)号：US09112531B2

    公开(公告)日：2015-08-18

    申请号：US13652012

    申请日：2012-10-15

    Applicant: LSI Corporation

    Inventor： Fan Zhang ,  Wu Chang ,  Shaohua Yang ,  Ming Jin

    IPC: H03M13/05 ,  H03M13/00 ,  H03M13/11 ,  H03M13/41

    CPC classification number: H03M13/1128 ,  H03M13/1137 ,  H03M13/114 ,  H03M13/1142 ,  H03M13/41 ,  H03M13/6331 ,  H03M13/6343

    Abstract: Systems and methods for data processing particularly related local iteration randomization in a data decoding circuit. In some cases a data processing system may include: a layered data decoding circuit, a value generator circuit, and a selector circuit. The layered data decoding circuit is configured to iteratively apply a data decoding algorithm up to a selected number of times to a decoder input to yield a decoded output in accordance with a layer order. The value generator circuit is operable configured to generate an adjusted number of times where the adjusted number of times is less than a default number of times. The selector circuit is operable configured to select one of the default number of times and the adjusted number of times as the selected number of times.

    Abstract translation: 用于数据处理的系统和方法特别涉及数据解码电路中的局部迭代随机化。 在一些情况下，数据处理系统可以包括：分层数据解码电路，值产生器电路和选择器电路。 分层数据解码电路被配置为将数据解码算法迭代地应用到解码器输入的选定次数，以根据层次顺序产生解码的输出。 值产生器电路可操作地配置为产生经调整次数小于默认次数的调整次数。 选择器电路可操作地配置为选择默认次数和调整次数中的一个作为所选次数。

    Inter-track interference mitigation in magnetic recording systems using averaged values
    3.
    发明授权
    Inter-track interference mitigation in magnetic recording systems using averaged values 有权
    磁记录系统中使用平均值的轨道间干扰减轻

    公开(公告)号：US08902524B2

    公开(公告)日：2014-12-02

    申请号：US13834648

    申请日：2013-03-15

    Applicant: LSI Corporation

    Inventor： Erich F. Haratsch ,  Ming Jin ,  George Mathew ,  Jongseung Park ,  Kurt J. Worrell

    IPC: G11B5/09 ,  G11B20/22 ,  G11B5/012 ,  G11B19/04 ,  G11B20/10

    CPC classification number: G11B20/22 ,  G11B5/012 ,  G11B5/09 ,  G11B19/045 ,  G11B20/10009

    Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems using averaged values. Inter-track interference (ITI) is mitigated in a magnetic recording system by obtaining ITI cancellation data; and providing the ITI cancellation data for ITI mitigation, wherein the ITI mitigation is performed in combination with an averaging procedure for one or more of ITI mitigation of averaged data and averaging of ITI mitigated data. The sector is optionally decoded using the ITI mitigated samples. Samples for one or more side track sectors can also be averaged. The averaged side track samples can be provided as ITI cancellation data for ITI mitigation. The averaging procedure optionally applies a scaling factor to each read value.

    Abstract translation: 提供基于硬件的方法和装置，用于使用平均值的磁记录系统中的轨道间干扰减轻。 通过获取ITI取消数据，在磁记录系统中减轻了轨道间干扰（ITI）。 以及提供用于ITI缓解的ITI抵消数据，其中ITI缓解与对平均数据的ITI缓解和ITI缓解数据的平均中的一个或多个的平均过程相结合执行。 可选地使用ITI缓解样本来解码扇区。 也可以对一个或多个侧轨道扇区的采样进行平均。 可以将平均的侧轨样本作为ITI缓解的ITI取消数据提供。 平均过程可选地对每个读取值应用缩放因子。

    Threshold Acquisition and Adaption in NAND Flash Memory
    4.
    发明申请
    Threshold Acquisition and Adaption in NAND Flash Memory 有权
    NAND闪存中的阈值采集和适配

    公开(公告)号：US20140119113A1

    公开(公告)日：2014-05-01

    申请号：US13664583

    申请日：2012-10-31

    Applicant: LSI CORPORATION

    Inventor： Haitao Xia ,  Fan Zhang ,  Ming Jin ,  Shaohua Yang

    IPC: G11C16/06

    CPC classification number: G11C16/06 ,  G11C16/34 ,  G11C16/349

    Abstract: A method, apparatus, and controller for acquiring and tracking at least one threshold voltage of at least one cell of at least one flash chip. The method can include acquiring the at least one threshold voltage of a particular cell of the at least one flash cell. The method can further include performing at least one threshold voltage adjustment iteration.

    Abstract translation: 一种用于获取和跟踪至少一个闪存芯片的至少一个单元的至少一个阈值电压的方法，装置和控制器。 该方法可以包括获取至少一个闪存单元的特定单元的至少一个阈值电压。 该方法还可以包括执行至少一个阈值电压调整迭代。

    Systems and Methods for Indirect Information Assisted Media Defect Scan
    5.
    发明申请
    Systems and Methods for Indirect Information Assisted Media Defect Scan 审中-公开
    间接信息辅助媒体缺陷扫描的系统和方法

    公开(公告)号：US20140108875A1

    公开(公告)日：2014-04-17

    申请号：US13652046

    申请日：2012-10-15

    Applicant: LSI CORPORATION

    Inventor： Ming Jin ,  Fan Zhang ,  Haitao Xia

    IPC: G11B20/18 ,  G06F11/16

    CPC classification number: G11B20/18

    Abstract: Systems, circuits, devices and/or methods related to systems and methods for data processing, and more particularly to systems and methods for media defect detection.

    Abstract translation: 与用于数据处理的系统和方法相关的系统，电路，设备和/或方法，更具体地涉及用于介质缺陷检测的系统和方法。

    Threshold acquisition and adaption in NAND flash memory
    6.
    发明授权
    Threshold acquisition and adaption in NAND flash memory 有权
    NAND闪存中的阈值采集和适配

    公开(公告)号：US08942037B2

    公开(公告)日：2015-01-27

    申请号：US13664583

    申请日：2012-10-31

    Applicant: LSI Corporation

    Inventor： Haitao Xia ,  Fan Zhang ,  Ming Jin ,  Shaohua Yang

    IPC: G11C11/34

    CPC classification number: G11C16/06 ,  G11C16/34 ,  G11C16/349

    Abstract: A method, apparatus, and controller for acquiring and tracking at least one threshold voltage of at least one cell of at least one flash chip. The method can include acquiring the at least one threshold voltage of a particular cell of the at least one flash cell. The method can further include performing at least one threshold voltage adjustment iteration.

    Abstract translation: 一种用于获取和跟踪至少一个闪存芯片的至少一个单元的至少一个阈值电压的方法，装置和控制器。 该方法可以包括获取至少一个闪存单元的特定单元的至少一个阈值电压。 该方法还可以包括执行至少一个阈值电压调整迭代。

    Systems and methods for medium proximity detection in a read channel
    7.
    发明授权
    Systems and methods for medium proximity detection in a read channel 有权
    在读通道中进行中等接近检测的系统和方法

    公开(公告)号：US08773809B2

    公开(公告)日：2014-07-08

    申请号：US13690435

    申请日：2012-11-30

    Applicant: LSI Corporation

    Inventor： Ming Jin ,  Erich F. Haratsch ,  Jason S. Goldberg ,  Kurt J. Worrell ,  Scott M. Dziak ,  Jeffrey P. Grundvig

    IPC: G11B21/02

    CPC classification number: G11B27/36 ,  G11B5/6076 ,  G11B2220/2516

    Abstract: A contact event between a sensing device and a storage medium is detected by receiving a signal indicating a physical proximity between the sensing device and the storage medium; generating a plurality of frequency bin outputs; comparing one or more frequency bin outputs to a corresponding first level threshold to yield a corresponding comparator output; summing the comparator output with at least one prior instance of the comparator output to yield an aggregated value; comparing the aggregated value to an aggregate threshold to yield an aggregate output; and generating a contact event output if one or more of a first group of the plurality of frequency bin outputs has an associated aggregate output set to a predefined binary value and a predefined minimum number of a second group of the plurality of frequency bin outputs has an associated aggregate output set to a predefined binary value.

    Abstract translation: 通过接收指示感测装置和存储介质之间的物理接近的信号来检测感测装置和存储介质之间的接触事件; 产生多个频率仓输出; 将一个或多个频率仓输出与相应的第一电平阈值进行比较以产生相应的比较器输出; 将比较器输出与比较器输出的至少一个先前实例相加以产生聚合值; 将聚合值与聚合阈值进行比较以产生总产出; 以及如果所述多个频率仓输出中的第一组中的一个或多个具有设置为预定二进制值的相关联的聚合输出并且所述多个频率仓输出中的第二组的预定最小数量具有 关联的聚合输出设置为预定义的二进制值。

    Fixed-point processing using quantization levels based on floating-point processing
    8.
    发明授权
    Fixed-point processing using quantization levels based on floating-point processing 有权
    使用基于浮点处理的量化级的定点处理

    公开(公告)号：US08743493B1

    公开(公告)日：2014-06-03

    申请号：US13742753

    申请日：2013-01-16

    Applicant: LSI Corporation

    Inventor： Wu Chang ,  Fan Zhang ,  Ming Jin

    IPC: G11B20/10

    CPC classification number: G11B20/10268

    Abstract: An apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry comprises a detector and a decoder coupled to the detector. The detector is configured to perform fixed-point detection on a digital data signal using a first set of quantization levels determined based at least in part on a result of a floating-point detection of the digital data signal. The decoder is configured to perform fixed-point decoding on an output of the detector using a second set of quantization levels determined based at least in part on a result of a floating-point decoding of the output of the detector.

    Abstract translation: 一种装置包括读通道电路和与读通道电路相关联的信号处理电路。 信号处理电路包括耦合到检测器的检测器和解码器。 检测器被配置为使用至少部分地基于数字数据信号的浮点检测的结果确定的第一组量化级对数字数据信号执行定点检测。 解码器被配置为使用至少部分地基于检测器的输出的浮点解码的结果确定的第二组量化级对检测器的输出执行定点解码。

    Harmonic Ratio Based Defect Classifier
    9.
    发明申请
    Harmonic Ratio Based Defect Classifier 有权
    基于谐波比的缺陷分类器

    公开(公告)号：US20140140182A1

    公开(公告)日：2014-05-22

    申请号：US13680497

    申请日：2012-11-19

    Applicant: LSI CORPORATION

    Inventor： Scott M. Dziak ,  Ming Jin ,  Jonathan Dykhuis

    IPC: G11B27/36

    CPC classification number: G11B27/36 ,  G11B20/182 ,  G11B2220/2516

    Abstract: The disclosure is directed to a system and method for detecting and classifying at least one media defect. A periodic pattern is written to a medium to yield at least one waveform. The magnitude of the waveform is compared against a defect threshold to detect the presence or absence of media defects in the medium. When at least one defect is detected, a magnitude for each of at least two harmonics of the waveform is determined in the defect range. The defect is classified by comparing a ratio of the magnitudes of the at least two harmonics against a classification threshold.

    Abstract translation: 本公开涉及用于检测和分类至少一个介质缺陷的系统和方法。 将周期性图案写入介质以产生至少一个波形。 将波形的大小与缺陷阈值进行比较，以检测介质中是否存在介质缺陷。 当检测到至少一个缺陷时，在缺陷范围内确定波形的至少两个谐波中的每一个的幅度。 通过比较至少两个谐波的幅度与分类阈值的比值来分类缺陷。

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