知搜-全球专利检索

  1. 登录
  2. 注册

搜索结果

27 条记录 (耗时 0.02 秒)

    Lateral high-breakdown-voltage transistor
    1.
    发明授权
    Lateral high-breakdown-voltage transistor 有权
    横向高击穿电压晶体管

    公开(公告)号：US06707104B2

    公开(公告)日：2004-03-16

    申请号：US10277744

    申请日：2002-10-23

    申请人： Kiminori Watanabe ,  Keisuke Matsuoka ,  Takao Ito

    发明人： Kiminori Watanabe ,  Keisuke Matsuoka ,  Takao Ito

    IPC分类号： H01L2978

    CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/7393 ,  H01L29/7801 ,  H01L29/7835

    摘要： A lateral high-breakdown-voltage transistor comprises an n− drain region and an n+ source region formed in a p− silicon substrate, separated from each other, a gate electrode formed on a channel, insulated from the substrate, an n+ drain contact region formed in the drain region, drain wiring electrically connected to the drain region via the drain contact region, a p+ substrate contact region formed in contact with the source region, and source wiring electrically connected to the source region and also connected to the semiconductor layer via the substrate contact region. The transistor is characterized in that the substrate contact regions have respective portions made to be in contact with the source wiring, and accordingly laterally extend from inside the contact surface of the source wiring to outside the contact surface.

    摘要翻译： 横向高击穿电压晶体管包括彼此分离的在p型硅衬底中形成的n +漏极区域和n +源极区域，形成在与衬底绝缘的沟道上的栅极电极 ，形成在漏极区域中的n +漏极接触区域，经由漏极接触区域与漏极区域电连接的漏极布线，与源极区域形成的ap +衬底接触区域，以及与源极区域电连接的源极布线 并且还经由衬底接触区域连接到半导体层。 晶体管的特征在于，衬底接触区域具有与源极布线接触的相应部分，并且因此从源极布线的接触表面的内侧横向延伸到接触表面的外部。

    Lateral high-breakdown-voltage transistor having drain contact region
    2.
    发明授权
    Lateral high-breakdown-voltage transistor having drain contact region 有权
    具有漏极接触区域的横向高击穿电压晶体管

    公开(公告)号：US06989568B2

    公开(公告)日：2006-01-24

    申请号：US10748187

    申请日：2003-12-31

    申请人： Kiminori Watanabe ,  Keisuke Matsuoka ,  Takao Ito

    发明人： Kiminori Watanabe ,  Keisuke Matsuoka ,  Takao Ito

    IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/7393 ,  H01L29/7801 ,  H01L29/7835

    摘要： A lateral high-breakdown-voltage transistor comprises an n− drain region and an n+ source region formed in a p− silicon substrate, separated from each other, a gate electrode formed on a channel, insulated from the substrate, an n+ drain contact region formed in the drain region, drain wiring electrically connected to the drain region via the drain contact region, a p+ substrate contact region formed in contact with the source region, and source wiring electrically connected to the source region and also connected to the semiconductor layer via the substrate contact region. The transistor is characterized in that the substrate contact regions have respective portions made to be in contact with the source wiring, and accordingly laterally extend from inside the contact surface of the source wiring to outside the contact surface.

    摘要翻译： 横向高击穿电压晶体管包括在硅衬底中形成的漏极 - 漏区和n + 彼此形成在与衬底绝缘的沟道上的栅极电极，形成在漏极区域中的n +漏极接触区域，经由漏极接触区域电连接到漏极区域的漏极布线， 与源极区域形成的基板接触区域以及与源极区域电连接并且还经由基板接触区域与半导体层连接的源极布线。 晶体管的特征在于，衬底接触区域具有与源极布线接触的相应部分，并且因此从源极布线的接触表面的内侧横向延伸到接触表面的外部。

    Lateral high-breakdown-voltage transistor
    3.
    发明授权
    Lateral high-breakdown-voltage transistor 有权
    横向高击穿电压晶体管

    公开(公告)号：US06489653B2

    公开(公告)日：2002-12-03

    申请号：US09746223

    申请日：2000-12-26

    申请人： Kiminori Watanabe ,  Keisuke Matsuoka ,  Takao Ito

    发明人： Kiminori Watanabe ,  Keisuke Matsuoka ,  Takao Ito

    IPC分类号： H01L2978

    CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/7393 ,  H01L29/7801 ,  H01L29/7835

    摘要： A lateral high-breakdown-voltage transistor comprises an n− drain region and an n+ source region formed in a p− silicon substrate, separated from each other, a gate electrode formed on a channel, insulated from the substrate, an n+ drain contact region formed in the drain region, drain wiring electrically connected to the drain region via the drain contact region, a p+ substrate contact region formed in contact with the source region, and source wiring electrically connected to the source region and also connected to the semiconductor layer via the substrate contact region. The transistor is characterized in that the substrate contact regions have respective portions made to be in contact with the source wiring, and accordingly laterally extend from inside the contact surface of the source wiring to outside the contact surface.

    摘要翻译： 横向高击穿电压晶体管包括形成在p硅衬底中的n沟道区和n +源极区，其彼此分离，形成在与衬底绝缘的沟道上的栅电极，n +漏极接触区域 形成在所述漏极区域中的漏极布线，经由所述漏极接触区域电连接到所述漏极区域的漏极布线，与所述源极区域接触形成的p +基板接触区域以及与所述源极区域电连接并且还连接到所述半导体层通孔 基板接触区域。 晶体管的特征在于，衬底接触区域具有与源极布线接触的相应部分，并且因此从源极布线的接触表面的内侧横向延伸到接触表面的外部。

    Method of operating thyristor with insulated gates
    4.
    发明授权
    Method of operating thyristor with insulated gates 失效
    用绝缘栅极操作晶闸管的方法

    公开(公告)号：US5428228A

    公开(公告)日：1995-06-27

    申请号：US164756

    申请日：1993-12-10

    申请人： Tsuneo Ogura ,  Kiminori Watanabe ,  Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Norio Yasuhara ,  Tomoko Matsudai ,  Shigeru Hasegawa ,  Kazuya Nakayama

    发明人： Tsuneo Ogura ,  Kiminori Watanabe ,  Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Norio Yasuhara ,  Tomoko Matsudai ,  Shigeru Hasegawa ,  Kazuya Nakayama

    IPC分类号： H01L27/06 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/747

    CPC分类号： H01L27/0617 ,  H01L29/7436 ,  H01L29/7455 ,  H01L29/749

    摘要： A thyristor with insulated gates includes turn-off and turn-on MOSFETs. The turn-on MOSFET has a turn-on gate employing a p-type base as a channel and extending over an n-type base and an n-type emitter. The turn-off MOSFET has n-type drain and source layers formed in a p-type base layer, and a turn-off gate extending over the drain and source layers. The n-type drain layer is short-circuited with the p-type base layer via a drain electrode. The drain electrode is formed near an n-type emitter layer. When the thyristor is to be turned off, the first voltage is applied to the turn-on gate, and the second voltage is applied to the turn-off gate while the first voltage is applied to the turn-on gate. After the application of the second voltage continues for a predetermined period of time, the application of the first voltage to the turn-on gate is stopped. With this operation, the thyristor can be turned off even with a large current.

    摘要翻译： 具有绝缘栅极的晶闸管包括关断和导通MOSFET。 导通MOSFET具有采用p型基极作为沟道并在n型基极和n型发射极上延伸的导通栅极。 关断MOSFET具有形成在p型基极层中的n型漏极和源极层，以及在漏极和源极层上延伸的截止栅极。 n型漏极层经由漏电极与p型基极层短路。 在n型发射极层附近形成漏电极。 当晶闸管关断时，第一电压被施加到导通栅极，并且第二电压被施加到关断栅极，同时第一电压被施加到导通栅极。 在第二电压的施加持续预定时间段之后，停止向导通门施加第一电压。 通过这种操作，即使使用大电流，晶闸管也可以关闭。

    Conductivity-modulation metal oxide semiconductor field effect transistor
    5.
    发明授权
    Conductivity-modulation metal oxide semiconductor field effect transistor 失效
    电导率调制金属氧化物半导体场效应晶体管

    公开(公告)号：US4980743A

    公开(公告)日：1990-12-25

    申请号：US160277

    申请日：1988-02-25

    申请人： Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe

    发明人： Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe

    IPC分类号： H01L29/78 ,  H01L27/04 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/68 ,  H01L29/739 ,  H01L29/745

    CPC分类号： H01L29/405 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7455

    摘要： A conductivity-modulation MOSFET employs a substrate of an N type conductivity as its N base. A first source layer of a heavily-doped N type conductivity is formed in a P base layer formed in the N base. A source electrode electrically conducts the P base and the source. A first gate electrode insulatively covers a channel region defined by the N.sup.+ source layer in the P base. A P drain layer is formed on an opposite substrate surface. An N.sup.+ second source layer is formed in a P type drain layer by diffusion to define a second channel region. A second gate electrode insulatively covers the second channel region, thus providing a voltage-controlled turn-off controlling transistor. A drain electrode of the MOSFET conducts the P type drain and second source. When the turn-off controlling transistor is rendered conductive to turn off the MOSFET a "shorted anode structure" is temporarily formed wherein the N type base is short-circuited to the drain electrode, whereby case, the flow of carriers accumulated in the N type base into the drain electrode is facilitated to accelerate dispersion of carriers upon turn-off of the transistors.

    摘要翻译： 导电调制型MOSFET采用N型导电性基板作为N基极。 在形成在N基底中的P基底层中形成重掺杂N型导电性的第一源极层。 源极电极导电P基极和源极。 第一栅极绝缘地覆盖由P基底中的N +源层限定的沟道区域。 在相对的基板表面上形成P漏极层。 通过扩散在P型漏极层中形成N +第二源极层，以限定第二沟道区。 第二栅电极绝缘地覆盖第二沟道区，从而提供电压控制关断控制晶体管。 MOSFET的漏电极导通P型漏极和第二源极。 当关断控制晶体管导通以关断MOSFET时，暂时形成“短路阳极结构”，其中N型基极短路到漏极，由此情况下，累积在N型的载流子 有助于在晶体管关断时加速载流子的散射。

    Conductivity modulated MOSFET
    7.
    发明授权
    Conductivity modulated MOSFET 失效
    电导率调制MOSFET

    公开(公告)号：US4672407A

    公开(公告)日：1987-06-09

    申请号：US738188

    申请日：1985-05-28

    申请人： Akio Nakagawa ,  Hiromichi Ohashi ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe ,  Thuneo Thukakoshi

    发明人： Akio Nakagawa ,  Hiromichi Ohashi ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe ,  Thuneo Thukakoshi

    IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/739 ,  H01L29/78

    CPC分类号： H01L29/1095 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/7393 ,  H01L29/7395

    摘要： A conductivity modulated MOSFET, having a semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type formed on the semiconductor substrate and having a high resistance, a base layer of the first conductivity type formed in the semiconductor layer, a source layer of the second conductivity type formed in the base layer, a gate electrode formed on a gate insulating film which is formed on a channel region, the channel region being formed in a surface of the base layer between the semiconductor layer and the source layer, a source electrode ohmic-contacting the source layer and the base layer, and a drain electrode formed on the surface of the semiconductor substrate opposite to the semiconductor layer, characterized in that the conductivity modulated MOSFET has a saturation current smaller than a latch-up current when a predetermined gate voltage is applied to the gate electrode.

    摘要翻译： 一种电导率调制MOSFET，具有第一导电类型的半导体衬底，形成在半导体衬底上并且具有高电阻的第二导电类型的半导体层，形成在半导体层中的第一导电类型的基极层，源极 形成在基底层中的第二导电类型的层，形成在形成在沟道区上的栅极绝缘膜上的栅电极，沟道区形成在半导体层和源极层之间的基底层的表面中， 欧姆接触源极层和基极层的源电极以及形成在半导体衬底的与半导体层相反的表面上的漏电极，其特征在于，导电调制MOSFET的饱和电流小于闭锁电流 当预定的栅极电压施加到栅电极时。

    Conductivity-modulation metal oxide semiconductor field effect transistor
    10.
    发明授权
    Conductivity-modulation metal oxide semiconductor field effect transistor 失效
    电导率调制金属氧化物半导体场效应晶体管

    公开(公告)号：US5124773A

    公开(公告)日：1992-06-23

    申请号：US563720

    申请日：1990-08-07

    申请人： Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe

    发明人： Akio Nakagawa ,  Yoshihiro Yamaguchi ,  Kiminori Watanabe

    IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/739 ,  H01L29/745

    CPC分类号： H01L29/405 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7455

    摘要： A conductivity-modulation MOSFET employs a substrate of an N type conductivity as its N base. A first source layer of a heavily-doped N type conductivity is formed in a P base layer formed in the N base. A source electrode electrically conducts the P base and the source. A first gate electrode insulatively covers a channel region defined by the N.sup.+ source layer in the P base. A P drain layer is formed on an opposite substrate surface. An N.sup.+ second source layer is formed in a P type drain layer by diffusion to define a second channel region. A second gate electrode insulatively covers the second channel region, thus providing a voltage-controlled turn-off controlling transistor. A drain electrode of the MOSFET conducts the P type drain and second source. When the turn-off controlling transistor is rendered conductive to turn off the MOSFET a "shorted anode structure" is temporarily formed wherein the N type base is short-circuited to the drain electrode, whereby case, the flow of carriers accumulated in the N type base into the drain electrode is facilitated to accelerate dispersion of carriers upon turn-off of the transistor.

    摘要翻译： 导电调制型MOSFET采用N型导电性基板作为N基极。 在形成在N基底中的P基底层中形成重掺杂N型导电性的第一源极层。 源极电极导电P基极和源极。 第一栅极绝缘地覆盖由P基底中的N +源层限定的沟道区域。 在相对的基板表面上形成P漏极层。 通过扩散在P型漏极层中形成N +第二源极层，以限定第二沟道区。 第二栅电极绝缘地覆盖第二沟道区，从而提供电压控制关断控制晶体管。 MOSFET的漏电极导通P型漏极和第二源极。 当关断控制晶体管导通以关断MOSFET时，暂时形成“短路阳极结构”，其中N型基极短路到漏极，由此情况下，累积在N型的载流子 有助于在晶体管截止时加速载流子的分散。