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公开(公告)号:US10388536B2
公开(公告)日:2019-08-20
申请号:US15527622
申请日:2015-11-17
发明人: Satoshi Torimi , Masato Shinohara , Youji Teramoto , Norihito Yabuki , Satoru Nogami , Tadaaki Kaneko , Koji Ashida , Yasunori Kutsuma
IPC分类号: H01L21/306 , H01L21/67 , C30B29/36 , C30B33/12 , H01L21/302 , C30B35/00
摘要: Provided is a method for controlling the rate of etching of a SiC substrate based on a composition of a storing container. The etching method of the present invention is for etching the SiC substrate by heating the SiC substrate under Si vapor pressure, in a state where the SiC substrate is stored in a crucible. The crucible is formed of a tantalum metal, and has a tantalum carbide layer provided on an internal space side of the tantalum metal, and a tantalum silicide layer provided on the side further toward the internal space side than the tantalum carbide layer. The rate of etching of the SiC substrate is controlled based on difference in a composition of the tantalum silicide layer.
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公开(公告)号:US20170345672A1
公开(公告)日:2017-11-30
申请号:US15527526
申请日:2015-11-17
发明人: Tadaaki Kaneko , Koji Ashida , Yasunori Kutsuma , Satoshi Torimi , Masato Shinohara , Youji Teramoto , Norihito Yabuki , Satoru Nogami
IPC分类号: H01L21/306 , H01L21/04 , C30B33/12 , H01L21/304 , C30B29/36
CPC分类号: H01L21/30621 , C30B29/36 , C30B33/12 , H01L21/0445 , H01L21/302 , H01L21/304
摘要: Provided is a surface treatment method for a SiC substrate (40), the method being capable of controlling whether to generate a step bunching or the type of step bunching that is generated. In the surface treatment method in which the surface of the SiC substrate (40) is etched by heating the SiC substrate (40) under Si vapor pressure, an etching mode and an etching depth which are determined at least on the basis of an etching rate, are controlled to etch the SiC substrate (40), so that a surface pattern of the SiC substrate (40) after etching treatment is controlled.
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公开(公告)号:US10665465B2
公开(公告)日:2020-05-26
申请号:US15527526
申请日:2015-11-17
发明人: Tadaaki Kaneko , Koji Ashida , Yasunori Kutsuma , Satoshi Torimi , Masato Shinohara , Youji Teramoto , Norihito Yabuki , Satoru Nogami
IPC分类号: H01L21/306 , C30B29/36 , C30B33/12 , H01L21/302 , H01L21/04 , H01L21/304
摘要: Provided is a surface treatment method for a SiC substrate (40), the method being capable of controlling whether to generate a step bunching or the type of step bunching that is generated. In the surface treatment method in which the surface of the SiC substrate (40) is etched by heating the SiC substrate (40) under Si vapor pressure, an etching mode and an etching depth which are determined at least on the basis of an etching rate, are controlled to etch the SiC substrate (40), so that a surface pattern of the SiC substrate (40) after etching treatment is controlled.
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公开(公告)号:US20170323797A1
公开(公告)日:2017-11-09
申请号:US15527622
申请日:2015-11-17
发明人: Satoshi Torimi , Masato Shinohara , Youji Teramoto , Norihito Yabuki , Satoru Nogami , Tadaaki Kaneko , Koji Ashida , Yasunori Kutsuma
IPC分类号: H01L21/306 , H01L21/67
CPC分类号: H01L21/30604 , C30B29/36 , C30B33/12 , C30B35/002 , H01L21/302 , H01L21/67063
摘要: Provided is a method for controlling the rate of etching of a SiC substrate based on a composition of a storing container. The etching method of the present invention is for etching the SiC substrate by heating the SiC substrate under Si vapor pressure, in a state where the SiC substrate is stored in a crucible. The crucible is formed of a tantalum metal, and has a tantalum carbide layer provided on an internal space side of the tantalum metal, and a tantalum silicide layer provided on the side further toward the internal space side than the tantalum carbide layer. The rate of etching of the SiC substrate is controlled based on difference in a composition of the tantalum silicide layer.
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公开(公告)号:US20220259759A1
公开(公告)日:2022-08-18
申请号:US17734511
申请日:2022-05-02
发明人: Tadaaki Kaneko , Yasunori Kutsuma , Koji Ashida , Ryo Hashimoto
摘要: Disclosed is a SiC container (3) in which Si vapor and C vapor are generated in the internal space during the heat treatment. The SiC container may be heated in Si atmosphere to grow an epitaxial layer of single crystalline SiC on the underlying substrate housed in the internal space. The SiC container may be heated in a TaC container of a material including TaC supplemented with a source of Si to grow an epitaxial layer of single crystalline SiC on the underlying substrate housed in the internal space.
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公开(公告)号:US20200279716A1
公开(公告)日:2020-09-03
申请号:US16879208
申请日:2020-05-20
发明人: Tadaaki Kaneko , Koji Ashida
摘要: A reference sample (41) has a step/terrace structure made of monocrystalline SiC and a surface of each terrace has first or second stack orientation. In the reference sample (41), contrast as difference in lightness and darkness between an image of a terrace with a surface directly under which the first stack orientation lies and an image of a terrace with a surface directly under which the second stack orientation lies changes according to an incident electron angle which is an angle that an electron beam emitted from a scanning electron microscope forms with a perpendicular to the terrace surface. Even when a SiC substrate has an off angle (e.g., from 1° to 8°), using an inclined support base (20a) capable of correcting the off angle enables sharp contrast that reflects difference between the first and second stack orientations directly under the surface to be obtained irrespective of the off angle.
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公开(公告)号:US12131960B2
公开(公告)日:2024-10-29
申请号:US17606743
申请日:2020-04-24
发明人: Tadaaki Kaneko , Daichi Dojima , Koji Ashida , Tomoya Ihara
CPC分类号: H01L22/12 , G01B21/08 , G01K1/026 , H01L21/67248 , H01L21/67253
摘要: To provide a new temperature distribution evaluation method, a temperature distribution evaluation device, and a soaking range evaluation method, as the temperature distribution evaluation method which evaluates a temperature distribution of a heating area 40A provided in a heating device 40, the present invention is a temperature distribution evaluation method which, in the heating area 40A, heats a semiconductor substrate 10 and a transmitting and receiving body 20 for transporting a raw material to and from the semiconductor substrate 10, and evaluates a temperature distribution of the heating area 40A on the basis of a substrate thickness variation amount A of the semiconductor substrate 10. Accordingly, temperature distribution evaluation can be implemented for a high temperature area at 1600-2200° C. or the like at which it is hard to evaluate the temperature distribution due to the limit of a thermocouple material.
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公开(公告)号:US20180312992A1
公开(公告)日:2018-11-01
申请号:US15772884
申请日:2016-11-08
发明人: Tadaaki Kaneko , Yasunori Kutsuma , Koji Ashida
CPC分类号: C30B19/04 , C30B19/12 , C30B29/36 , H01L21/02378 , H01L21/0243 , H01L21/02529 , H01L21/02609 , H01L21/02625 , H01L29/045 , H01L29/1608
摘要: In a first step, protrusions (42) are formed on a surface of an SiC substrate (40), and the SiC substrate (40) is etched. In a second step, the protrusions (42) of the SiC substrate (40) are epitaxially grown through MSE process, and an epitaxial layer (43a) containing threading screw dislocation, which has been largely grown in the vertical (c-axis) direction as a result of MSE process, is at least partially removed. In a third step, MSE process is performed again on the SiC substrate (40) after the second step, to cause epitaxial layers (43) containing no threading screw dislocation to be grown in the horizontal (a-axis) direction to be connected at the molecular level, so that one monocrystalline 4H—SiC semiconductor wafer (45) having a large area is generated throughout an Si-face or a C-face of the SiC substrate (40).
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公开(公告)号:US12020928B2
公开(公告)日:2024-06-25
申请号:US17291574
申请日:2019-11-05
发明人: Tadaaki Kaneko , Koji Ashida , Tomoya Ihara , Daichi Dojima
CPC分类号: H01L21/02529 , C30B23/02 , C30B25/20 , C30B29/36 , H01L21/02428 , H01L21/02612
摘要: An object of the present invention is to provide a SiC semiconductor substrate capable of reducing a density of basal plane dislocations (BPD) in a growth layer, a manufacturing method thereof, and a manufacturing device thereof. The method includes: a strained layer removal process S10 that removes a strained layer introduced on a surface of a SiC substrate; and an epitaxial growth process S20 that conducts growth under a condition that a terrace width W of the SiC substrate is increased. When a SiC semiconductor substrate is manufactured in such processes, the basal plane dislocations BPD in the growth layer can be reduced, and a yield of a SiC semiconductor device can be improved.
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公开(公告)号:US20190148107A1
公开(公告)日:2019-05-16
申请号:US16096443
申请日:2017-04-27
发明人: Tadaaki Kaneko , Koji Ashida
摘要: A reference sample (41) has a step/terrace structure made of monocrystalline SiC and a surface of each terrace has first or second stack orientation. In the reference sample (41), contrast as difference in lightness and darkness between an image of a terrace with a surface directly under which the first stack orientation lies and an image of a terrace with a surface directly under which the second stack orientation lies changes according to an incident electron angle which is an angle that an electron beam emitted from a scanning electron microscope forms with a perpendicular to the terrace surface. Even when a SiC substrate has an off angle (e.g., from 1° to 8°), using an inclined support base (20a) capable of correcting the off angle enables sharp contrast that reflects difference between the first and second stack orientations directly under the surface to be obtained irrespective of the off angle.
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