SEMICONDUCTOR STORAGE DEVICE
    1.
    发明申请

    公开(公告)号:US20220310640A1

    公开(公告)日:2022-09-29

    申请号:US17460967

    申请日:2021-08-30

    摘要: A semiconductor storage device includes a first conductive layer that extends in a first direction; a second conductive layer that extends in the first direction and is arranged with the first conductive layer in a second direction; a first insulating layer that is provided between the first conductive layer and the second conductive layer; a semiconductor layer that extends in the second direction and faces the first conductive layer, the second conductive layer, and the first insulating layer in a third direction; a first charge storage layer that is provided between the first conductive layer and the semiconductor layer; a second charge storage layer that is provided between the second conductive layer and the semiconductor layer; a first high dielectric constant layer that is provided between the first conductive layer and the first charge storage layer; and a second high dielectric constant layer provided between the second conductive layer and the second charge storage layer. At least a portion of the first charge storage layer faces the second charge storage layer without the second high dielectric constant layer being interposed between the portion of the first charge storage layer and the second charge storage layer in the second direction.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20220262954A1

    公开(公告)日:2022-08-18

    申请号:US17734960

    申请日:2022-05-02

    摘要: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.

    SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

    公开(公告)号:US20220301896A1

    公开(公告)日:2022-09-22

    申请号:US17407641

    申请日:2021-08-20

    IPC分类号: H01L21/67 H01L21/3213

    摘要: A substrate processing apparatus includes a chamber, a supply pipe, a discharge pipe, a trap section, a heater, a buffer section, and a cooling pipe. The chamber houses a substrate. The supply pipe supplies a processing gas into the chamber. The discharge pipe discharges a gas produced in the chamber. The trap section is disposed in the discharge pipe. The heater heats the trap section. The buffer section is disposed downstream of the trap section in the discharge pipe. The cooling pipe cools the buffer section.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20210305431A1

    公开(公告)日:2021-09-30

    申请号:US17022328

    申请日:2020-09-16

    摘要: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.

    SEMICONDUCTOR MEMORY DEVICE
    6.
    发明申请

    公开(公告)号:US20210296347A1

    公开(公告)日:2021-09-23

    申请号:US17017385

    申请日:2020-09-10

    摘要: According to one embodiment, a semiconductor memory device includes: a first semiconductor layer; first and second insulating layers in contact with the first semiconductor layer; a second semiconductor layer in contact with the first insulating layer; a third semiconductor layer in contact with the second insulating layer; a first conductor; a third insulating layer in contact with the first conductor; a fourth insulating layer provided between the second semiconductor layer and the third insulating layer; a first charge storage layer provided between the second semiconductor layer and the fourth insulating layer; and a fifth insulating layer provided between the second semiconductor layer and the first charge storage layer. The second semiconductor layer, the first conductor, the third to fifth insulating layers, and the first charge storage layer function as a first memory cell.

    SEMICONDUCTOR DEVICE
    7.
    发明公开

    公开(公告)号:US20240097044A1

    公开(公告)日:2024-03-21

    申请号:US18456419

    申请日:2023-08-25

    摘要: According to one embodiment, a semiconductor device includes a first conductive layer between first and second insulating layers with an oxide semiconductor column extending in the first direction through these layers. A third insulating layer covers the column. The column has a first semiconductor portion at a first position matching the first insulating layer, a second semiconductor portion at a second position matching second insulating layer, and a third semiconductor portion at a third position matching the first conductive layer. The first semiconductor portion is continuous along a second direction between the third insulating layer, the second semiconductor portion is continuous along the second direction between the third insulating layer, but the third semiconductor portion is not continuous between the third insulating layer.

    SEMICONDUCTOR DEVICE, SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

    公开(公告)号:US20230090044A1

    公开(公告)日:2023-03-23

    申请号:US17687407

    申请日:2022-03-04

    摘要: A semiconductor device of an embodiment includes a first electrode, a second electrode, a first oxide semiconductor layer between the first electrode and the second electrode, the first oxide semiconductor layer containing in, Zn, and a first metal element, and the first metal element being at least one metal of Ga, Mg, or Mn, a second oxide semiconductor layer between the first oxide semiconductor layer and the second electrode, the second oxide semiconductor layer containing In, Zn, and the first metal element, a third oxide semiconductor layer between the first oxide semiconductor layer and the second oxide semiconductor layer, the third oxide semiconductor layer containing in, Zn, and a second metal element, the second metal element being at least one metal of Al, Hf, La, Sn, Ta, Ti, W, Y, or Zr, a gate electrode facing the third oxide semiconductor layer, and a gate insulating.

    SEMICONDUCTOR MEMORY DEVICE
    9.
    发明申请

    公开(公告)号:US20220352188A1

    公开(公告)日:2022-11-03

    申请号:US17692920

    申请日:2022-03-11

    摘要: A semiconductor memory device includes a first semiconductor layer, first conductive layers, electric charge accumulating portions, a first conductivity-typed second semiconductor layer, a first wiring, a second conductivity-typed third semiconductor layer, and a second conductive layer. The first semiconductor layer extends in a first direction. First conductive layers are arranged in the first direction and extend in a second direction. Electric charge accumulating portions are disposed between the first semiconductor layer and first conductive layers. The second semiconductor layer is connected to one end of the first semiconductor layer. The first wiring is connected to the first semiconductor layer via the second semiconductor layer. The third semiconductor layer is connected to a side surface in a third direction of the first semiconductor layer. The second conductive layer extends in the second direction and is connected to the first semiconductor layer via the third semiconductor layer.