公开(公告)号：US20240103871A1

公开(公告)日：2024-03-28

申请号：US17955379

申请日：2022-09-28

申请人： Jason Brandt ,  Ittai Anati ,  Andreas Kleen ,  David Sheffield

发明人： Jason Brandt ,  Ittai Anati ,  Andreas Kleen ,  David Sheffield

IPC分类号： G06F9/30

CPC分类号： G06F9/3016 ,  G06F9/30101 ,  G06F9/30189

摘要： Techniques for CPUID are described. In some examples, a CPUID instruction is to include at least one field for an opcode, the opcode to indicate execution circuitry is to return processor identification and feature information determined by input into a first register and a second register, wherein the processor identification and feature information is to include an indication of an availability of a second execution mode that at least deprecates features of a first execution.

公开(公告)号：US20240103869A1

公开(公告)日：2024-03-28

申请号：US17955347

申请日：2022-09-28

申请人： Andreas Kleen ,  Jason Brandt ,  Ittai Anati ,  David Sheffield ,  Toby Opferman ,  Ian Hanschen ,  Xiang Zou ,  Terry Parks

发明人： Andreas Kleen ,  Jason Brandt ,  Ittai Anati ,  David Sheffield ,  Toby Opferman ,  Ian Hanschen ,  Xiang Zou ,  Terry Parks

IPC分类号： G06F9/30

CPC分类号： G06F9/3016 ,  G06F9/30189

摘要： Techniques for using CPUID for showing features that are deprecated are described. In some examples, CPUID is to include at least one field for an opcode, one or more fields to identify a source operand which is to store a LSL selector value, and one or more fields to identify a destination register operand, wherein the opcode is to indicate that execution circuitry is to, when the single instruction has been enabled by a setting of a bit in a control register, write a LSL value stored in the control register to the destination operand when the LSL selector value of the first source register operand matches a LSL selector value stored in the control register, and set a flag in a flags register.

公开(公告)号：US20240103870A1

公开(公告)日：2024-03-28

申请号：US17955364

申请日：2022-09-28

申请人： Andreas Kleen ,  David Sheffield ,  Jason Brandt ,  Ittai Anati

发明人： Andreas Kleen ,  David Sheffield ,  Jason Brandt ,  Ittai Anati

IPC分类号： G06F9/30

CPC分类号： G06F9/3016 ,  G06F9/30032 ,  G06F9/3005

摘要： Techniques for supporting a far jump and IRET are described. An example far jump instruction support includes support for a single instruction to include at least one field for an opcode and one or more fields for an operand, wherein the opcode is to indicate execution circuitry is to perform a far jump and the operand is to specify an address to be jumped to, wherein an operand size attribute of the instance of the instruction is 32-bit or greater and the instruction has been enabled by a setting of a bit in a compatibility control register.

公开(公告)号：US20130179706A1

公开(公告)日：2013-07-11

申请号：US13782473

申请日：2013-03-01

申请人： Krishnakanth V. Sistla ,  Jeremy Shrall ,  Stephen H. Gunther ,  Efraim Rotem ,  Alon Naveh ,  Eliezer Weissmann ,  Anil Aggarwal ,  Martin T. Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Avinash N. Ananthakrishnan ,  Jason Brandt

发明人： Krishnakanth V. Sistla ,  Jeremy Shrall ,  Stephen H. Gunther ,  Efraim Rotem ,  Alon Naveh ,  Eliezer Weissmann ,  Anil Aggarwal ,  Martin T. Rowland ,  Ankush Varma ,  Ian M. Steiner ,  Matthew Bace ,  Avinash N. Ananthakrishnan ,  Jason Brandt

IPC分类号： G06F1/26

CPC分类号： G06F1/3275 ,  G06F1/266 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3234

摘要： In one embodiment, the present invention includes a processor having a core and a power controller to control power management features of the processor. The power controller can receive an energy performance bias (EPB) value from the core and access a power-performance tuning table based on the value. Using information from the table, at least one setting of a power management feature can be updated. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明包括具有核心的处理器和用于控制处理器的电源管理特征的功率控制器。 功率控制器可以从核心接收能量性能偏差（EPB）值，并根据该值访问功率性能调谐表。 使用表中的信息，可以更新电源管理功能的至少一个设置。 描述和要求保护其他实施例。

公开(公告)号：US20120079248A1

公开(公告)日：2012-03-29

申请号：US12890292

申请日：2010-09-24

申请人： Jonathan D. Combs ,  Kameswar Subramaniam ,  Jason Brandt

发明人： Jonathan D. Combs ,  Kameswar Subramaniam ,  Jason Brandt

IPC分类号： G06F9/30 ,  G06F9/22

CPC分类号： G06F9/384 ,  G06F9/226 ,  G06F9/26 ,  G06F9/30145 ,  G06F9/3824 ,  G06F9/4484

摘要： An apparatus of an aspect includes a plurality of microcode alias locations and a microcode storage. A microinstruction of a microcode subroutine is stored in the microcode storage. The microinstruction has an indication of a microcode alias location. A microcode caller of the microcode subroutine is also stored in the microcode storage. The microcode caller is operable to specify a location of a parameter in the microcode alias location that is indicated by the microinstruction of the microcode subroutine. The apparatus also includes parameter location determination logic that is coupled with the microcode alias locations. The parameter location determination logic is operable, responsive to the microinstruction of the microcode subroutine, to receive the indication of the microcode alias location from the microinstruction and determine the location of the parameter specified in the microcode alias location indicated by the microinstruction.

摘要翻译： 一个方面的装置包括多个微码别名位置和微码存储器。 微代码子程序的微指令存储在微代码存储器中。 微指令具有微代码位置的指示。 微码子程序的微代码调用者也存储在微代码存储器中。 微代码调用者可操作地指定由微代码子程序的微指令指示的微代码别名位置中的参数的位置。 该装置还包括与微码别名位置耦合的参数位置确定逻辑。 参数位置确定逻辑可操作以响应于微代码子程序的微指令，从微指令接收微码别名位置的指示，并确定由微指令指示的微码别名位置中指定的参数的位置。

公开(公告)号：US09235417B2

公开(公告)日：2016-01-12

申请号：US13992712

申请日：2011-12-31

申请人： Jason Brandt ,  Jonathan Tyler ,  John Zurawski ,  Dennis Lastor

发明人： Jason Brandt ,  Jonathan Tyler ,  John Zurawski ,  Dennis Lastor

IPC分类号： G06F11/30 ,  G06F9/30

CPC分类号： G06F9/30145 ,  G06F11/30 ,  G06F11/3466 ,  G06F11/348 ,  G06F11/3636 ,  G06F2201/805

摘要： In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for implementing Real Time Instruction Tracing compression of RET instructions For example, in one embodiment, such means may include an integrated circuit having means for initiating instruction tracing for instructions of a traced application, mode, or code region, as the instructions are executed by the integrated circuit; means for generating a plurality of packets describing the instruction tracing; and means for compressing a multi-bit RET instruction (RETurn instruction) to a single bit RET instruction.

摘要翻译： 根据本文公开的实施例，提供了用于实现RET指令的实时指令跟踪压缩的方法，系统，机制，技术和装置。例如，在一个实施例中，这种装置可以包括具有用于发起指令跟踪的装置的集成电路 用于由跟踪的应用程序，模式或代码区域的指令，因为指令由集成电路执行; 用于产生描述所述指令跟踪的多个分组的装置; 以及用于将多位RET指令（RETurn指令）压缩到单个位RET指令的装置。

公开(公告)号：US20150095617A1

公开(公告)日：2015-04-02

申请号：US14039663

申请日：2013-09-27

申请人： Vedvyas SHANBHOGUE ,  Jason Brandt ,  Uday Savagaonkar ,  Ravi Sahita

发明人： Vedvyas SHANBHOGUE ,  Jason Brandt ,  Uday Savagaonkar ,  Ravi Sahita

IPC分类号： G06F9/30

CPC分类号： G06F9/30054 ,  G06F9/30076 ,  G06F9/30181 ,  G06F9/3861 ,  G06F21/00

摘要： In an embodiment, the present invention includes a processor having a decode unit, an execution unit, and a retirement unit. The decode unit is to decode control transfer instructions and the execution unit is to execute control transfer instructions. The retirement unit is to retire a first control transfer instruction, and to raise a fault if a next instruction to be retired after the first control transfer instruction is not a second control transfer instruction and a target instruction of the first control transfer instruction is in code using the control transfer instructions.

摘要翻译： 在一个实施例中，本发明包括具有解码单元，执行单元和退休单元的处理器。 解码单元用于解码控制传输指令，执行单元执行控制传输指令。 退休单元将退出第一控制传输指令，并且如果在第一控制传输指令之后的下一指令不是第二控制传送指令并且第一控制传输指令的目标指令处于代码中，则引起故障 使用控制传输指令。

公开(公告)号：US20070079301A1

公开(公告)日：2007-04-05

申请号：US11239475

申请日：2005-09-30

申请人： Gautham Chinya ,  Hong Wang ,  Prashant Sethi ,  Shivnandan Kaushik ,  Bryant Bigbee ,  John Shen ,  Richard Hankins ,  Xiang Zou ,  Baiju Patel ,  Jason Brandt ,  Anil Aggarwal ,  John Reid

发明人： Gautham Chinya ,  Hong Wang ,  Prashant Sethi ,  Shivnandan Kaushik ,  Bryant Bigbee ,  John Shen ,  Richard Hankins ,  Xiang Zou ,  Baiju Patel ,  Jason Brandt ,  Anil Aggarwal ,  John Reid

IPC分类号： G06F9/45

CPC分类号： G06F9/3005 ,  G06F9/3009 ,  G06F9/3851 ,  G06F9/3861 ,  G06F9/3877 ,  G06F9/3885 ,  G06F9/461

摘要： Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof

摘要翻译： 本发明的实施例提供了一种基于在操作系统可见定序器上运行并使用指令集扩展的操作系统调度的线程来创建持久用户级线程在操作系统隔离上运行的方法 音序器独立于操作系统调度线程上的上下文切换活动。 操作系统调度的线程和持久用户级线程可以共享公共虚拟地址空间。 本发明的实施例还可以提供一种使服务线程在附加操作系统可见定序器上运行以向持久用户级线程提供操作系统服务的方法。 本发明的实施例还可以提供其装置，系统和机器可读介质

公开(公告)号：US20060224858A1

公开(公告)日：2006-10-05

申请号：US11100032

申请日：2005-04-05

申请人： Hong Wang ,  Gautham Chinya ,  Richard Hankins ,  Shivnandan Kaushik ,  Bryant Bigbee ,  Per Hammarlund ,  Xiang Zou ,  Jason Brandt ,  Prashant Sethi ,  Douglas Carmean ,  Baiju Patel ,  John Shen ,  Scott Rodgers ,  Ryan Rakvic ,  John Reid ,  David Poulsen ,  Sanjiv Shah ,  James Held ,  James Abel

发明人： Hong Wang ,  Gautham Chinya ,  Richard Hankins ,  Shivnandan Kaushik ,  Bryant Bigbee ,  Per Hammarlund ,  Xiang Zou ,  Jason Brandt ,  Prashant Sethi ,  Douglas Carmean ,  Baiju Patel ,  John Shen ,  Scott Rodgers ,  Ryan Rakvic ,  John Reid ,  David Poulsen ,  Sanjiv Shah ,  James Held ,  James Abel

IPC分类号： G06F12/00

CPC分类号： G06F9/485 ,  G06F9/30043 ,  G06F9/30076 ,  G06F9/3851 ,  G06F9/3885 ,  G06F9/3891 ,  G06F9/461 ,  G06F9/4881

摘要： Disclosed are embodiments of a system, methods and mechanism for management and translation of mapping between logical sequencer addresses and physical or logical sequencers in a multi-sequencer multithreading system. A mapping manager may manage assignment and mapping of logical sequencer addresses or pages to actual sequencers or frames of the system. Rationing logic associated with the mapping manager may take into account sequencer attributes when such mapping is performed Relocation logic associated with the mapping manager may manage spill and fill of context information to/from a backing store when re-mapping actual sequencers. Sequencers may be allocated singly, or may be allocated as part of partitioned blocks. The mapping manager may also include translation logic that provides an identifier for the mapped sequencer each time a logical sequencer address is used in a user program. Other embodiments are also described and claimed.

摘要翻译： 公开了用于管理和转换逻辑定序器地址与多序列器多线程系统中的物理或逻辑顺控程序之间的映射的系统，方法和机制的实施例。 映射管理器可以管理逻辑顺控程序地址或页面到系统的实际定序器或帧的分配和映射。 与映射管理器相关联的配给逻辑可以在执行这样的映射时考虑定序器属性。当重新映射实际的定序器时，与映射管理器相关联的重定位逻辑可以管理向/从备份存储器的上下文信息的溢出和填充。 排序器可以单独分配，或者可以被分配为分区块的一部分。 映射管理器还可以包括每当在用户程序中使用逻辑定序器地址时为映射的定序器提供标识符的翻译逻辑。 还描述和要求保护其他实施例。

公开(公告)号：US20060005084A1

公开(公告)日：2006-01-05

申请号：US10882813

申请日：2004-06-30

申请人： Gilbert Neiger ,  Andrew Anderson ,  Steven Bennett ,  Jason Brandt ,  Erik Cota-Robles ,  Stalinselvaraj Jeyasingh ,  Alain Kagi ,  Sanjoy Mondal ,  Rajesh Parthasarathy ,  Dion Rodgers ,  Lawrence Smith ,  Richard Uhlig

发明人： Gilbert Neiger ,  Andrew Anderson ,  Steven Bennett ,  Jason Brandt ,  Erik Cota-Robles ,  Stalinselvaraj Jeyasingh ,  Alain Kagi ,  Sanjoy Mondal ,  Rajesh Parthasarathy ,  Dion Rodgers ,  Lawrence Smith ,  Richard Uhlig

IPC分类号： G06F11/00

CPC分类号： G06F9/45533 ,  G06F11/0712 ,  G06F11/0775 ,  G06F11/0787 ,  G06F11/0793

摘要： In one embodiment, information pertaining to a first fault occurring during operation of a virtual machine (VM) is stored in a first field. A second fault is detected while delivering the first fault to the VM, and a determination is made as to whether the second fault is associated with a transition of control to a virtual machine monitor (VMM). If this determination is positive, information pertaining to the second fault is stored in a second field, and control is transitioned to the VMM.

摘要翻译： 在一个实施例中，关于在虚拟机（VM）的操作期间发生的第一故障的信息被存储在第一字段中。 在向VM提供第一故障时检测到第二故障，并且确定第二故障是否与对虚拟机监视器（VMM）的控制转换相关联。 如果该确定是肯定的，则关于第二故障的信息被存储在第二场中，并且控制被转换到VMM。