Abstract:
A detecting device includes a substrate, a plurality of detection electrodes provided on the substrate and arrayed in a first direction parallel to the substrate, a plurality of drive electrodes provided on the substrate and arrayed in a second direction intersecting the first direction, a second selection circuit configured to select a plurality of the detection electrodes based on selection signals, a first selection circuit configured to select a plurality of the drive electrodes, a detector coupled to the selected detection electrodes out of the detection electrodes, and a memory storing therein, as a set of output data, a plurality of detection signals output from the selected detection electrodes via the detector by the first selection circuit scanning the drive electrodes in one period when the second selection circuit selects the detection electrodes.
Abstract:
According to one embodiment, a display device comprises a common electrode driver configured to supply to common electrodes a display voltage during a display period and a touch detection drive signal during a touch detection period, a source amplifier configured to supply an image signal to source lines, a gate driver configured to supply to gate lines a scanning signal during a display period and a guard signal during a touch detection period, and switches configured to connect the source lines and the common electrodes during a touch detection period.
Abstract:
A liquid crystal display device includes: pixel electrodes to each of which a potential corresponding to a gray-scale value is applied, for a plurality of pixels arranged in a matrix in a display area, via a pixel transistor of each of the pixels; a common electrode forming, in cooperation with the pixel electrode, an electric field to align a liquid crystal composition; a plurality of scanning signal lines each connected in common to gates of the pixel transistors of the plurality of pixels constituting each of a plurality of rows forming the matrix; and a driver circuit setting, after powering on and before displaying an image in the display area, the common electrode into a high impedance state and then setting the scanning signal line to an inactive potential to cut off a source and a drain of the pixel transistor from each other.
Abstract:
A display device is provided and includes common electrodes overlapping pixels; common driver configured to supply voltage during a display period and an AC drive signal touch detection during touch detection period; source lines connected to columns of pixels; source driver configured to supply an image signal; gate lines connected to rows of the pixels; select transistors connected between source driver and source lines; and controller configured to supply DC control signal to gate terminals of select transistors during display period, supply an AC control signal to gate terminals of select transistors during touch detection period, wherein AC control signal is synchronous with AC drive signal.
Abstract:
A display device includes, on a TFT substrate, a driver IC having a first bump and a second bump, a first terminal and a second terminal connecting respectively to the first bump and the second bump, and wiring interconnecting the first terminal and the second terminal. The driver IC also includes a resistance detection circuit that detects resistance between the first bump and the second bump.
Abstract:
A gate signal line driving circuit and a display device which can suppress the degradation of an element attributed to the use of the element for a long time, and can realize the prolongation of lifetime of the element are provided. With respect to elements to which a HIGH voltage is applied for a long time, a plurality of elements are connected in parallel, and at least some of the plurality of elements are driven by switching elements.
Abstract:
A bidirectional shift register capable of performing a stable shift operation in both directions and an image display device using the same are provided. In forward shift operation, when reference point N1 is at H level, (n+4)-th unit register circuit as a rear stage of the bidirectional shift register outputs pulse G(n+4) in synchronization with clock pulse V(n+4) inputted to (n+4)-th unit register circuit. A backward direction trigger signal VSTB is generated not only at the time of start of backward shift, but also, for example, in period (time t4 to t5) of one-phase clock immediately after G(n+4) is outputted in vertical blanking interval of the forward shift. The backward direction trigger signal VSTB is inputted to gate of a transistor provided to set reference point N1 of (n+4)-th unit register circuit to H level at the time of start of the backward shift.