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    SHIFT REGISTER CIRCUIT
    1.
    发明申请
    SHIFT REGISTER CIRCUIT 有权

    公开(公告)号：US20210366564A1

    公开(公告)日：2021-11-25

    申请号：US17394475

    申请日：2021-08-05

    Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

    Inventor： Takahiro OCHIAI ,  Mitsuru GOTO ,  Hiroko SEHATA ,  Hiroyuki HIGASHIJIMA

    IPC: G11C19/28 ,  G09G3/36

    Abstract: A display device including a bidirectional shift register circuit, including: a plurality of cascade-connected register circuits; various circuits for setting various nodes to various voltage levels responsive to various signals input to various terminals; and an output circuit which outputs the clock pulse as an output pulse when the voltage of the first node is high level, wherein, at the forward shift operation, the bottom dummy register circuit is not input the reset signal and the first node of the bottom dummy register circuit is reset if the initial reset circuit of the bottom dummy register circuit receives the backward trigger signal, and wherein, at the backward shift operation, the top dummy register circuit is not input the reset signal and the first node of the top dummy register circuit is reset if the initial reset circuit of the top dummy register circuit receives the forward trigger signal.

    BIDIRECTIONAL SHIFT REGISTER AND IMAGE DISPLAY DEVICE USING THE SAME
    2.
    发明申请
    BIDIRECTIONAL SHIFT REGISTER AND IMAGE DISPLAY DEVICE USING THE SAME 审中-公开
    双向移位寄存器和使用其的图像显示装置

    公开(公告)号：US20140340293A1

    公开(公告)日：2014-11-20

    申请号：US14449363

    申请日：2014-08-01

    Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

    Inventor： Takahiro OCHIAI ,  Mitsuru GOTO ,  Hiroko SEHATA ,  Hiroyuki HIGASHIJIMA

    IPC: G09G3/36 ,  G11C19/28

    CPC classification number: G11C19/28 ,  G09G3/3674 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0413 ,  G09G2300/0465 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08

    Abstract: A display device including a bidirectional shift register circuit, including: a plurality of cascade-connected register circuits; various circuits for setting various nodes to various voltage levels responsive to various signals input to various terminals; and an output circuit which outputs the clock pulse as an output pulse when the voltage of the first node is high level, wherein, at the forward shift operation, the bottom dummy register circuit is not input the reset signal and the first node of the bottom dummy register circuit is reset if the initial reset circuit of the bottom dummy register circuit receives the backward trigger signal, and wherein, at the backward shift operation, the top dummy register circuit is not input the reset signal and the first node of the top dummy register circuit is reset if the initial reset circuit of the top dummy register circuit receives the forward trigger signal.

    Abstract translation: 一种包括双向移位寄存器电路的显示装置，包括：多个级联连接的寄存器电路; 各种电路，用于响应于输入到各种终端的各种信号将各种节点设置到各种电压电平; 以及输出电路，其在第一节点的电压为高电平时输出时钟脉冲作为输出脉冲，其中，在正向移位操作时，底部伪寄存器电路未输入复位信号和底部的第一节点 如果底部伪寄存器电路的初始复位电路接收到反向触发信号，则虚拟寄存器电路被复位，并且其中，在反向移位操作时，顶部伪寄存器电路不输入复位信号和顶部伪随机的第一个节点 如果顶部伪寄存器电路的初始复位电路接收到正向触发信号，则寄存器电路复位。

    LIQUID CRYSTAL DISPLAY DEVICE WITH INFLUENCES OF OFFSET VOLTAGES REDUCED
    3.
    发明申请
    LIQUID CRYSTAL DISPLAY DEVICE WITH INFLUENCES OF OFFSET VOLTAGES REDUCED 有权
    具有偏移电压影响的液晶显示装置减少

    公开(公告)号：US20140132645A1

    公开(公告)日：2014-05-15

    申请号：US14159472

    申请日：2014-01-21

    Applicant: Panasonic Liquid Crystal Display Co., Ltd. ,  Japan Display Inc.

    Inventor： Mitsuru GOTO ,  Hiroshi KATAYANAGI ,  Yukihide ODE ,  Yoshiyuki SAITOU ,  Koichi KOTERA

    IPC: G09G3/36

    CPC classification number: G09G3/3696 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289

    Abstract: A semiconductor integrated circuit including a first register which latches display data, a second register which latches the display data of the first register in accordance with a first clock, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages, and an amplifier including a first transistor and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal. A phase of the control signal is reversed at intervals of two horizontal scanning lines.

    Abstract translation: 一种半导体集成电路，包括锁存显示数据的第一寄存器，根据第一时钟锁存第一寄存器的显示数据的第二寄存器，输出多个灰度级电压的灰度级电压发生器，选择 根据来自多个灰度级电压的第二寄存器的显示数据的灰度级电压，以及包括第一晶体管和第二晶体管的放大器。 第一晶体管的第一端子和第二晶体管的第一端子连接到第一电压线，并且从解码器输出的灰度电压根据第一晶体管的第一端子被提供给第一晶体管和第二晶体管的输入端 一个控制信号。 控制信号的相位以两条水平扫描线的间隔反转。

    BIDIRECTIONAL SHIFT REGISTER CIRCUIT
    5.
    发明申请
    BIDIRECTIONAL SHIFT REGISTER CIRCUIT 审中-公开

    公开(公告)号：US20200321068A1

    公开(公告)日：2020-10-08

    申请号：US16906286

    申请日：2020-06-19

    Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

    Inventor： Takahiro OCHIAI ,  Mitsuru GOTO ,  Hiroko SEHATA ,  Hiroyuki HIGASHIJIMA

    IPC: G11C19/28 ,  G09G3/36

    Abstract: A display device including a bidirectional shift register circuit, including: a plurality of cascade-connected register circuits; various circuits for setting various nodes to various voltage levels responsive to various signals input to various terminals; and an output circuit which outputs the clock pulse as an output pulse when the voltage of the first node is high level, wherein, at the forward shift operation, the bottom dummy register circuit is not input the reset signal and the first node of the bottom dummy register circuit is reset if the initial reset circuit of the bottom dummy register circuit receives the backward trigger signal, and wherein, at the backward shift operation, the top dummy register circuit is not input the reset signal and the first node of the top dummy register circuit is reset if the initial reset circuit of the top dummy register circuit receives the forward trigger signal.

    GATE SIGNAL LINE DRIVING CIRCUIT AND DISPLAY DEVICE
    7.
    发明申请
    GATE SIGNAL LINE DRIVING CIRCUIT AND DISPLAY DEVICE 审中-公开
    门控信号线路驱动电路和显示设备

    公开(公告)号：US20140375615A1

    公开(公告)日：2014-12-25

    申请号：US14478130

    申请日：2014-09-05

    Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

    Inventor： Takahiro OCHIAI ,  Mitsuru GOTO ,  Youzou NAKAYASU ,  Yuki OKADA ,  Naoki TAKADA

    IPC: G09G3/36

    CPC classification number: G09G3/3696 ,  G09G3/3674 ,  G09G2300/0434

    Abstract: A gate signal line driving circuit which suppresses noises in a gate signal and a display device which uses the gate signal line driving circuit are provided. A first basic circuit provided to a gate signal line driving circuit includes a HIGH voltage applying switching element which applies a HIGH voltage to gate signal lines in response to a signal HIGH period, and a LOW voltage applying switching circuit which applies a LOW voltage to the gate signal lines in response to a signal LOW period. In response to a signal HIGH period, a switch of the LOW voltage applying switching circuit of the first basic circuit is turned off based on a signal applied to a switch of the HIGH voltage applying switching element of a second basic circuit which assumes a signal HIGH period earlier than the first basic circuit.

    Abstract translation: 提供了抑制门信号中的噪声的门信号线驱动电路和使用栅信号线驱动电路的显示装置。 提供给栅极信号线驱动电路的第一基本电路包括：高电压施加开关元件，其响应于信号高电平周期向栅极信号线施加HIGH电压;以及低电压施加开关电路，其向所述低电压施加开关元件施加低电压 门信号线响应于信号低电平周期。 响应于信号高电平周期，第一基本电路的低电压施加开关电路的开关基于施加到假设信号为高的第二基本电路的高电压施加开关元件的开关的信号而截止 比第一个基本电路早。

    BIDIRECTIONAL SHIFT REGISTER AND IMAGE DISPLAY DEVICE USING THE SAME
    10.
    发明申请
    BIDIRECTIONAL SHIFT REGISTER AND IMAGE DISPLAY DEVICE USING THE SAME 审中-公开
    双向移位寄存器和使用其的图像显示装置

    公开(公告)号：US20160217871A1

    公开(公告)日：2016-07-28

    申请号：US15090664

    申请日：2016-04-05

    Applicant: Japan Display Inc.

    Inventor： Takahiro OCHIAI ,  Mitsuru GOTO ,  Hiroyuki HIGASHIJIMA ,  Yoshihiro KOTANI ,  Shuuichirou MATSUMOTO

    IPC: G11C19/28 ,  G09G5/00

    CPC classification number: G11C19/287 ,  G09G3/3677 ,  G09G5/003 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021

    Abstract: A bidirectional shift register capable of performing a stable shift operation in both directions and an image display device using the same are provided. In forward shift operation, when reference point N1 is at H level, (n+4)-th unit register circuit as a rear stage of the bidirectional shift register outputs pulse G(n+4) in synchronization with clock pulse V(n+4) inputted to (n+4)-th unit register circuit. A backward direction trigger signal VSTB is generated not only at the time of start of backward shift, but also, for example, in period (time t4 to t5) of one-phase clock immediately after G(n+4) is outputted in vertical blanking interval of the forward shift. The backward direction trigger signal VSTB is inputted to gate of a transistor provided to set reference point N1 of (n+4)-th unit register circuit to H level at the time of start of the backward shift.

    Abstract translation: 提供能够在两个方向上执行稳定的移位操作的双向移位寄存器和使用其的图像显示装置。 在正向移位操作中，当参考点N1处于H电平时，作为双向移位寄存器的后级的第（n + 4）单位寄存器电路与时钟脉冲V（n + 4）同步地输出脉冲G（n + 4）输入到第（n + 4）个单元寄存器电路。 不仅在反向开始时产生反向触发信号VSTB，而且例如在紧接在G（n + 4）之后的单相时钟的周期（时刻t4〜t5）中垂直输出 向前移位的消隐间隔。 反向触发信号VSTB被输入到在第（n + 4）个单位寄存器电路的参考点N1设置为H电平的晶体管的栅极上，在反向启动时为止。

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