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公开(公告)号:US20190198444A1
公开(公告)日:2019-06-27
申请号:US15855133
申请日:2017-12-27
IPC分类号: H01L23/528 , H01L21/768 , H01L23/532
摘要: Techniques are provided to fabricate metallic interconnect structures in a single metallization level, wherein different width metallic interconnect structures are formed of different metallic materials to eliminate or minimize void formation in the metallic interconnect structures. For example, a semiconductor device includes an insulating layer disposed on a substrate, and a first metallic line and a second metallic line formed in the insulating layer. The first metallic line has a first width, and the second metallic line has a second width which is greater than the first width. The first metallic line is formed of a first metallic material, and the second metallic line is formed of a second metallic material, which is different from the first metallic material. For example, the first metallic material is cobalt or ruthenium, and the second metallic material is copper.
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公开(公告)号:US10177030B2
公开(公告)日:2019-01-08
申请号:US15403667
申请日:2017-01-11
IPC分类号: H01L21/76 , H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532
摘要: Methods and structures for forming cobalt contact and/or cobalt interconnects includes depositing a stress control layer onto the cobalt layer prior to annealing after which the stress control layer can be removed. The stress control layer prevents formation of defects that can occur in the absence of the stress control layer.
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3.
公开(公告)号:US20190221477A1
公开(公告)日:2019-07-18
申请号:US16213618
申请日:2018-12-07
IPC分类号: H01L21/768 , H01L23/532 , H01L23/522
CPC分类号: H01L21/76858 , H01L21/76802 , H01L21/76843 , H01L21/76865 , H01L21/76873 , H01L21/76879 , H01L23/5226 , H01L23/53238 , H01L23/53295
摘要: Methods for fabricating low-resistivity metallic interconnect structures with self-forming diffusion barrier layers are provided, as well as semiconductor devices comprising low-resistivity metallic interconnect structures with self-formed diffusion barrier layers. For example, a semiconductor device includes a dielectric layer disposed on a substrate, an opening etched in the dielectric layer, a metallic liner layer covering sidewall and bottom surfaces of the opening in the dielectric layer, copper material filling the opening to form an interconnect structure, and a self-formed diffusion barrier layer formed in the sidewall surfaces of the opening of the dielectric layer. The self-formed diffusion barrier layer includes manganese atoms which are diffused into the sidewall surfaces of the dielectric layer.
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公开(公告)号:US20180197774A1
公开(公告)日:2018-07-12
申请号:US15801933
申请日:2017-11-02
IPC分类号: H01L21/768 , H01L23/532 , H01L23/528 , H01L23/522
CPC分类号: H01L21/76883 , H01L21/76814 , H01L21/76816 , H01L21/7684 , H01L21/76843 , H01L21/7685 , H01L21/76877 , H01L21/76886 , H01L23/5226 , H01L23/528 , H01L23/53209
摘要: Methods and structures for forming cobalt contact and/or cobalt interconnects includes depositing a stress control layer onto the cobalt layer prior to annealing after which the stress control layer can be removed. The stress control layer prevents formation of defects that can occur in the absence of the stress control layer.
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公开(公告)号:US11037875B2
公开(公告)日:2021-06-15
申请号:US16364700
申请日:2019-03-26
IPC分类号: H01L21/768 , H01L23/532 , H01L23/528
摘要: Techniques are provided to fabricate metallic interconnect structures in a single metallization level, wherein different width metallic interconnect structures are formed of different metallic materials to eliminate or minimize void formation in the metallic interconnect structures. For example, a semiconductor device includes an insulating layer disposed on a substrate, and a first metallic line and a second metallic line formed in the insulating layer. The first metallic line has a first width, and the second metallic line has a second width which is greater than the first width. The first metallic line is formed of a first metallic material, and the second metallic line is formed of a second metallic material, which is different from the first metallic material. For example, the first metallic material is cobalt or ruthenium, and the second metallic material is copper.
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公开(公告)号:US20190221519A1
公开(公告)日:2019-07-18
申请号:US16364700
申请日:2019-03-26
IPC分类号: H01L23/528 , H01L21/768 , H01L23/532
CPC分类号: H01L23/5283 , H01L21/76816 , H01L21/7684 , H01L21/76846 , H01L21/76847 , H01L21/76871 , H01L21/76877 , H01L23/53238 , H01L23/53266
摘要: Techniques are provided to fabricate metallic interconnect structures in a single metallization level, wherein different width metallic interconnect structures are formed of different metallic materials to eliminate or minimize void formation in the metallic interconnect structures. For example, a semiconductor device includes an insulating layer disposed on a substrate, and a first metallic line and a second metallic line formed in the insulating layer. The first metallic line has a first width, and the second metallic line has a second width which is greater than the first width. The first metallic line is formed of a first metallic material, and the second metallic line is formed of a second metallic material, which is different from the first metallic material. For example, the first metallic material is cobalt or ruthenium, and the second metallic material is copper.
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公开(公告)号:US11031337B2
公开(公告)日:2021-06-08
申请号:US16445428
申请日:2019-06-19
IPC分类号: H01L21/768 , H01L23/532 , H01L23/528
摘要: Techniques are provided to fabricate metallic interconnect structures in a single metallization level, wherein different width metallic interconnect structures are formed of different metallic materials to eliminate or minimize void formation in the metallic interconnect structures. For example, a semiconductor device includes an insulating layer disposed on a substrate, and a first metallic line and a second metallic line formed in the insulating layer. The first metallic line has a first width, and the second metallic line has a second width which is greater than the first width. The first metallic line is formed of a first metallic material, and the second metallic line is formed of a second metallic material, which is different from the first metallic material. For example, the first metallic material is cobalt or ruthenium, and the second metallic material is copper.
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公开(公告)号:US10373867B2
公开(公告)日:2019-08-06
申请号:US15801933
申请日:2017-11-02
IPC分类号: H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532
摘要: Methods and structures for forming cobalt contact and/or cobalt interconnects includes depositing a stress control layer onto the cobalt layer prior to annealing after which the stress control layer can be removed. The stress control layer prevents formation of defects that can occur in the absence of the stress control layer.
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9.
公开(公告)号:US10204829B1
公开(公告)日:2019-02-12
申请号:US15870213
申请日:2018-01-12
发明人: Hari P. Amanapu , Cornelius Brown Peethala , Raghuveer R. Patlolla , Chih-Chao Yang , Takeshi Nogami
IPC分类号: H01L21/44 , H01L21/768 , H01L23/522 , H01L23/532
摘要: Methods for fabricating low-resistivity metallic interconnect structures with self-forming diffusion barrier layers are provided, as well as semiconductor devices comprising low-resistivity metallic interconnect structures with self-formed diffusion barrier layers. For example, a semiconductor device includes a dielectric layer disposed on a substrate, an opening etched in the dielectric layer, a metallic liner layer covering sidewall and bottom surfaces of the opening in the dielectric layer, copper material filling the opening to form an interconnect structure, and a self-formed diffusion barrier layer formed in the sidewall surfaces of the opening of the dielectric layer. The self-formed diffusion barrier layer includes manganese atoms which are diffused into the sidewall surfaces of the dielectric layer.
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公开(公告)号:US10559530B2
公开(公告)日:2020-02-11
申请号:US15855133
申请日:2017-12-27
IPC分类号: H01L21/768 , H01L23/528 , H01L23/532
摘要: Techniques are provided to fabricate metallic interconnect structures in a single metallization level, wherein different width metallic interconnect structures are formed of different metallic materials to eliminate or minimize void formation in the metallic interconnect structures. For example, a semiconductor device includes an insulating layer disposed on a substrate, and a first metallic line and a second metallic line formed in the insulating layer. The first metallic line has a first width, and the second metallic line has a second width which is greater than the first width. The first metallic line is formed of a first metallic material, and the second metallic line is formed of a second metallic material, which is different from the first metallic material. For example, the first metallic material is cobalt or ruthenium, and the second metallic material is copper.
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