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公开(公告)号:US20210175238A1
公开(公告)日:2021-06-10
申请号:US17155015
申请日:2021-01-21
申请人: Intel Corporation
发明人: Brain S. DOYLE , Kaan OGUZ , Ricky J. TSENG , Kevin P. O'BRIEN
IPC分类号: H01L27/1159 , H01L29/66 , H01L29/78 , G11C5/06
摘要: Techniques are disclosed for forming integrated circuit (IC) devices that include ferroelectric field-effect transistors (FE-FETs) having a top gate and a bottom gate (or, generally, a dual-gate configuration). The disclosed FE-FET devices may be formed in the back end of the IC structure and may be implemented with various materials that exhibit ferroelectric properties when processed at temperatures within the thermal budget of the back-end processing. The disclosed back-end FE-FET devices can achieve greater than two resistance states, depending on the direction of poling of the top and bottom gates, thereby enabling the formation of 3-state and 4-state memory devices, for example. Additionally, as will be appreciated in light of this disclosure, the disclosed back-end FE-FET devices can free up floor space in the front-end, thereby providing space for additional devices in the front-end.
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2.
公开(公告)号:US20200006636A1
公开(公告)日:2020-01-02
申请号:US16024709
申请日:2018-06-29
申请人: Intel Corporation
发明人: Tanay GOSAVI , Sasikanth MANIPATRUNI , Chia-Ching LIN , Gary ALLEN , Kaan OGUZ , Kevin O?BRIEN , Noriyuki SATO , Ian YOUNG , Dmitri NIKONOV
摘要: Embodiments herein relate to magnetically doping a spin orbit torque electrode (SOT) in a magnetic random access memory apparatus. In particular, the apparatus may include a free layer of a magnetic tunnel junction (MTJ) coupled to a SOT electrode that is magnetically doped to apply an effective magnetic field on the free layer, where the free layer has a magnetic polarization in a first direction and where current flowing through the magnetically doped SOT electrode is to cause the magnetic polarization of the free layer to change to a second direction that is substantially opposite to the first direction.
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公开(公告)号:US20170271576A1
公开(公告)日:2017-09-21
申请号:US15503680
申请日:2014-09-26
申请人: Intel Corporation
发明人: Kevin P. O'BRIEN , Kaan OGUZ , Brian S. DOYLE , Mark L. DOCZY , Charles C. KUO , Robert S. CHAU
CPC分类号: H01L43/08 , G11C11/161 , G11C11/1659 , H01F10/3295 , H01L43/02 , H01L43/10 , H01L43/12
摘要: A material layer stack for a magnetic tunneling junction, the material layer stack including a fixed magnetic layer; a dielectric layer; a free magnetic layer; and an amorphous electrically-conductive seed layer, wherein the fixed magnetic layer is disposed between the dielectric layer and the seed layer. A non-volatile memory device including a material stack including an amorphous electrically-conductive seed layer; and a fixed magnetic layer juxtaposed and in contact with the seed layer. A method including forming an amorphous seed layer on a first electrode of a memory device; forming a material layer stack on the amorphous seed layer, the material stack including a dielectric layer disposed between a fixed magnetic layer and a free magnetic layer, wherein the fixed magnetic layer.
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公开(公告)号:US20220310901A1
公开(公告)日:2022-09-29
申请号:US17211736
申请日:2021-03-24
申请人: Intel Corporation
发明人: Kaan OGUZ , Tanay GOSAVI , Emily WALKER , Chia-Ching LIN , Ian A. YOUNG
摘要: Spin orbit torque (SOT) devices with topological insulator (TI) and heavy metal insert are described. In an example, an integrated circuit structure includes a spin orbit coupling (SOC) interconnect including a TI material. A magnetic layer is above the SOC interconnect. An insert layer includes a heavy metal between and in contact with the TI material and the magnetic layer.
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公开(公告)号:US20220199801A1
公开(公告)日:2022-06-23
申请号:US17132996
申请日:2020-12-23
申请人: Intel Corporation
发明人: Prashant MAJHI , Abhishek A. SHARMA , Charles C. KUO , Brian S. DOYLE , Urusa ALAAN , Van H. LE , Elijah V. KARPOV , Kaan OGUZ , Arnab SEN GUPTA
IPC分类号: H01L29/66 , H01L29/786 , H01L29/49 , H01L29/51 , H01L21/683 , H01L29/78
摘要: Embodiments disclosed herein include a semiconductor devices with back end of line (BEOL) transistor devices. In an embodiment, a semiconductor device comprises a semiconductor substrate and a BEOL stack over the semiconductor substrate. In an embodiment, a field effect transistor (FET) is embedded in the BEOL stack. In an embodiment, the FET comprises a channel, a gate dielectric over the channel, where the gate dielectric is single crystalline, a gate electrode over the gate dielectric, and a source electrode and a drain electrode passing through the gate dielectric to contact the channel.
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公开(公告)号:US20220199609A1
公开(公告)日:2022-06-23
申请号:US17133595
申请日:2020-12-23
申请人: Intel Corporation
发明人: Urusa ALAAN , Abhishek A. SHARMA , Charles C. KUO , Benjamin ORR , Nicholas THOMSON , Ayan KAR , Arnab SEN GUPTA , Kaan OGUZ , Brian S. DOYLE , Prashant MAJHI , Van H. LE , Elijah V. KARPOV
摘要: Embodiments disclosed herein include semiconductor devices with electrostatic discharge (ESD) protection of the transistor devices. In an embodiment, a semiconductor device comprises a semiconductor substrate, where a transistor device is provided on the semiconductor substrate. In an embodiment, the semiconductor device further comprises a stack of routing layers over the semiconductor substrate, and a diode in the stack of routing layers. In an embodiment, the diode is configured to provide electrostatic discharge (ESD) protection to the transistor device.
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7.
公开(公告)号:US20200313076A1
公开(公告)日:2020-10-01
申请号:US16367131
申请日:2019-03-27
申请人: Intel Corporation
发明人: Kaan OGUZ , Christopher WIEGAND , Noriyuki SATO , Angeline SMITH , Tanay GOSAVI
摘要: A spin orbit memory device includes a first electrode including a beta-phase material. The spin orbit memory device further includes a material layer stack on a portion of the first electrode. The material layer stack includes a first layer on the first electrode, where the first layer includes a bcc material such as molybdenum. The material layer stack further includes layers of a perpendicular magnetic tunnel junction (pMTJ) device on the first layer. The pMTJ device includes a free magnet structure on the first layer, where the free magnet structure includes a first magnet and a second magnet on the first magnet. The pMTJ device further includes a fixed magnet above the free magnet structure and a tunnel barrier layer between the magnet structure and the third magnet and a second electrode coupled with the second magnet.
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公开(公告)号:US20230087624A1
公开(公告)日:2023-03-23
申请号:US17483795
申请日:2021-09-23
申请人: Intel Corporation
发明人: Kaan OGUZ , I-Cheng TUNG , Chia-Ching LIN , Sou-Chi CHANG , Matthew V. METZ , Uygar E. AVCI , Arnab SEN GUPTA
IPC分类号: H01L49/02
摘要: Embodiments described herein may be related to apparatuses, processes, and techniques related to increasing the capacitance density of MIM capacitors on dies or within packages. In particular, a MIM stack is disclosed that has multiple insulator layers between the metal, in order to increase the dielectric constant of the MIM stack. In particular, the first dielectric layer may include strontium, titanium, and oxygen and may be physically coupled with a second dielectric layer that may include barium, strontium, titanium, and oxygen. Other embodiments may be described and/or claimed.
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9.
公开(公告)号:US20200006637A1
公开(公告)日:2020-01-02
申请号:US16024714
申请日:2018-06-29
申请人: Intel Corporation
发明人: Tanay GOSAVI , Sasikanth MANIPATRUNI , Chia-Ching LIN , Kaan OGUZ , Christopher WIEGAND , Angeline SMITH , Noriyuki SATO , Kevin O'BRIEN , Benjamin BUFORD , Ian YOUNG , MD Tofizur RAHMAN
摘要: Embodiments herein relate to a system, apparatus, and/or process for producing a spin orbit torque (SOT) electrode that includes a first layer with a first side to couple with a free layer of a magnetic tunnel junction (MTJ) and a second layer coupled with a second side of the first layer opposite the first side, where a value of an electrical resistance in the first SOT layer is lower than a value of an electrical resistance in the second SOT layer and where a current applied to the SOT electrode is to cause current to preferentially flow in the first SOT layer to cause a magnetic polarization of the free layer to change directions. During production of the SOT electrode, the second layer may act as an etch stop.
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10.
公开(公告)号:US20190140166A1
公开(公告)日:2019-05-09
申请号:US16097801
申请日:2016-07-01
申请人: MD Tofizur RAHMAN , Christopher J. WIEGAND , Brian MAERTZ , Daniel G. OUELLETTE , Kaan OGUZ , Brian S. DOYLE , Mark L. DOCZY , Daniel B. BERGSTROM , Justin S. BROCKMAN , Oleg GOLONZKA , Tahhir GHANI , Intel Corporation
发明人: MD Tofizur RAHMAN , Christopher J. WIEGAND , Brian MAERTZ , Daniel G. OUELLETTE , Kevin P. O'BRIEN , Kaan OGUZ , Brian S. DOYLE , Mark L. DOCZY , Daniel B. BERGSTROM , Justin S. BROCKMAN , Oleg GOLONZKA , Tahir GHANI
CPC分类号: H01L43/12 , G11C11/161 , H01L43/02 , H01L43/08 , H01L43/10
摘要: Material layer stack structures to provide a magnetic tunnel junction (MTJ) having improved perpendicular magnetic anisotropy (PMA) characteristics. In an embodiment, a free magnetic layer of the material layer stack is disposed between a tunnel barrier layer and a cap layer of magnesium oxide (Mg). The free magnetic layer includes a Cobalt-Iron-Boron (CoFeB) body substantially comprised of a combination of Cobalt atoms, Iron atoms and Boron atoms. A first Boron mass fraction of the CoFeB body is equal to or more than 25% (e.g., equal to or more than 27%) in a first region which adjoins an interface of the free magnetic layer with the tunnel barrier layer. In another embodiment, the first Boron mass fraction is more than a second Boron mass fraction in a second region of the CoFeB body which adjoins an interface of the free magnetic layer with the cap layer.
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