公开(公告)号：US20230197716A1

公开(公告)日：2023-06-22

申请号：US17559719

申请日：2021-12-22

申请人： Intel Corporation

发明人： Cory C. Bomberger ,  Anand Murthy ,  Tahir Ghani ,  Ju Nam ,  Anupama Bowonder

IPC分类号： H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L21/8234

CPC分类号： H01L27/0886 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/0847 ,  H01L29/1033 ,  H01L21/823412 ,  H01L21/823418

摘要： An integrated circuit (IC) structure, an IC device, an IC device assembly, and a method of forming the same. The IC structure includes a transistor device comprising: a channel structure including a semiconductor material; a gate stack including a metal, the gate stack on the channel structure; a source structure in a first trench at a first side of the gate stack; a drain structure in a second trench at a second side of the gate stack; individual ones of the source structure and the drain structure including a source or drain (source/drain) liner comprising a doped epitaxial layer conformal with a surface of a corresponding one of the first trench and the second trench; a fill structure filling a portion of a corresponding one the first trench and the second trench, the fill structure adjacent to and compositionally different from the source/drain liner; and metal contact structures coupled to respective ones of the source structure and the drain structure.

公开(公告)号：US20230207317A1

公开(公告)日：2023-06-29

申请号：US17560641

申请日：2021-12-23

申请人： Intel Corporation

发明人： Cory C. Bomberger ,  Karthik Jambunathan ,  Anand Murthy ,  Ju Nam ,  Tahir Ghani

IPC分类号： H01L21/02 ,  H01L29/66 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L21/02694 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/1054 ,  H01L29/785

摘要： In one embodiment, an integrated circuit includes a substrate, a buffer layer, a source region, a drain region, a channel region, and a gate structure. The substrate includes silicon. The buffer layer is above the substrate and includes a semiconductor material having defects near an interface with the substrate. The buffer layer also includes ions implanted among the defects. The source region and drain region are above the buffer layer, and the channel region is above the buffer layer and between the source and drain regions. The gate structure above the channel region.