公开(公告)号：US11193975B2

公开(公告)日：2021-12-07

申请号：US16024722

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Christopher J. Nelson ,  Shelby G. Rollins ,  Hiren V. Tilala ,  Matthew Hendricks ,  Sundar V. Pathy ,  Timothy J. Callahan ,  Jared Pager ,  James Neeb ,  Bradly Inman ,  Stephen Sturges

IPC: G01R31/3183 ,  G01R31/3185 ,  G01R31/316 ,  G01R31/317

Abstract: Embodiments herein relate to apparatus, systems, and methods to compress a test pattern onto a field programmable gate array to test a device under test. This may include identifying values of a plurality of drive pins for a plurality of test cycles to apply to an input of the DUT for each of the plurality of test cycles, identifying values of a plurality of compare pins for the plurality of test cycles to compare an output of the DUT, respectively, for each of the plurality of test cycles, analyzing the identified values, compressing, based on the analysis, the values of the plurality of drive pins and the plurality of compare pins, and storing the compressed values on the FPGA.

公开(公告)号：US09548284B2

公开(公告)日：2017-01-17

申请号：US14132812

申请日：2013-12-18

Applicant: Intel Corporation

Inventor： Pramod Malatkar ,  Hemanth Dhavaleswarapu ,  James Neeb

IPC: H01L23/00 ,  H01L21/603 ,  B29L31/34

CPC classification number: H01L24/75 ,  B29L2031/34 ,  B29L2031/3425 ,  H01L2021/603 ,  H01L2224/75102 ,  H01L2224/75252 ,  H01L2224/75266 ,  H01L2224/75301 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/01008 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/0104 ,  H01L2924/01074 ,  H01L2924/0474 ,  H01L2924/0489 ,  H01L2924/04894 ,  H01L2924/05032 ,  H01L2924/0549 ,  Y10T29/49826

Abstract: Embodiments of a thermal compression bonding process bond head and a method for producing a thermal compression bonding process bond head are disclosed. In some embodiments, the bond head includes a thermal compression bonding process heater and a cooling block coupled to the heater through an annular structure. The annular structure surrounds a lower portion of the cooling block and couples the cooling block to the heater such that there is no direct mechanical contact between the cooling block and the heater.

Abstract translation: 公开了热压接工艺粘结头的实施例和用于制造热压接工艺粘合头的方法。 在一些实施例中，接合头包括热压接工艺加热器和通过环形结构联接到加热器的冷却块。 环形结构围绕冷却块的下部并且将冷却块连接到加热器，使得冷却块和加热器之间不存在直接的机械接触。

公开(公告)号：US20160313370A1

公开(公告)日：2016-10-27

申请号：US14655684

申请日：2014-07-28

Applicant: INTEL CORPORATION

Inventor： James Neeb ,  Vineet Pancholi ,  Gerard McSweeney ,  Shelby Rollins ,  Chris Johnson ,  Nathan Blackwell ,  Bradly L. Inman ,  Steven Lill ,  Rodney J. Christner ,  Phillip Barnes

IPC: G01R1/02 ,  G01R31/28 ,  G01R29/26

CPC classification number: G01R1/025 ,  G01R29/26 ,  G01R31/2896 ,  G01R31/31907

Abstract: A method is described that includes configuring multiple test units of a semiconductor device tester with respective information indicating respective storage space within either or both of an off load processing unit and central control unit of the tester. The method further includes streaming DUT data from the test units to their respective storage space within at least one of the off load processing unit and the central control unit such that the test units continually initiate the sending of their respective DUT data to their respective storage space.

Abstract translation: 描述了一种方法，其包括配置半导体器件测试器的多个测试单元，其各自的信息指示测试仪的卸载处理单元和中央控制单元中的任一个或两者中的相应存储空间。 该方法还包括将DUT数据从测试单元传送到其关闭负载处理单元和中央控制单元中的至少一个中的相应存储空间，使得测试单元连续地开始将它们各自的DUT数据发送到它们各自的存储空间 。

公开(公告)号：US09886401B2

公开(公告)日：2018-02-06

申请号：US15270858

申请日：2016-09-20

Applicant: INTEL CORPORATION

Inventor： James Neeb ,  Bradly L. Inman ,  Nathan S. Blackwell

IPC: G06F13/36 ,  G06F13/16 ,  G06F11/07 ,  G06F13/40

CPC classification number: G06F13/1673 ,  G06F11/0745 ,  G06F11/0751 ,  G06F11/0772 ,  G06F11/079 ,  G06F11/221 ,  G06F13/382 ,  G06F13/4027

Abstract: Techniques and configurations are disclosed herein for communication between devices. In some embodiments, a bus for communication between first and second devices may include a transmit buffer and one or more processing devices. The one or more processing devices may be configured to receive first asynchronous data from an operating system, running on a central processing unit of the first device, on an operating system signal path; transmit the first asynchronous data from the first device to the second device on a command signal path; transmit first data from the transmit buffer to the second device at a first fixed packet frequency on a transmit signal path; and receive data from the second device at a second fixed packet frequency on a receive signal path different from the transmit signal path. Other embodiments may be disclosed and/or claimed.

公开(公告)号：US09454499B2

公开(公告)日：2016-09-27

申请号：US13915325

申请日：2013-06-11

Applicant: INTEL CORPORATION

Inventor： James Neeb ,  Bradly L. Inman ,  Nathan S. Blackwell

IPC: G06F13/36 ,  G06F13/16 ,  G06F11/22 ,  G06F13/40

CPC classification number: G06F13/1673 ,  G06F11/0745 ,  G06F11/0751 ,  G06F11/0772 ,  G06F11/079 ,  G06F11/221 ,  G06F13/382 ,  G06F13/4027

Abstract: Techniques and configurations are disclosed herein for communication between devices. In some embodiments, a bus for communication between first and second devices may include a transmit buffer and one or more processing devices. The one or more processing devices may be configured to receive first asynchronous data from an operating system, running on a central processing unit of the first device, on an operating system signal path; transmit the first asynchronous data from the first device to the second device on a command signal path; transmit first data from the transmit buffer to the second device at a first fixed packet frequency on a transmit signal path; and receive data from the second device at a second fixed packet frequency on a receive signal path different from the transmit signal path. Other embodiments may be disclosed and/or claimed.

Abstract translation: 本文公开了用于设备之间的通信的技术和配置。 在一些实施例中，用于第一和第二设备之间的通信的总线可以包括发送缓冲器和一个或多个处理设备。 一个或多个处理设备可以被配置为在操作系统信号路径上从在第一设备的中央处理单元上运行的操作系统接收第一异步数据; 在命令信号路径上将第一异步数据从第一设备发送到第二设备; 在发送信号路径上以第一固定分组频率从发送缓冲器向第二设备发送第一数据; 并且在与发送信号路径不同的接收信号路径上以第二固定分组频率从第二设备接收数据。 可以公开和/或要求保护其他实施例。

公开(公告)号：US20150171047A1

公开(公告)日：2015-06-18

申请号：US14132812

申请日：2013-12-18

Applicant: Intel Corporation

Inventor： Pramod Malatkar ,  Hemanth Dhavaleswarapu ,  James Neeb

IPC: H01L23/00 ,  B29C65/18

CPC classification number: H01L24/75 ,  B29L2031/34 ,  B29L2031/3425 ,  H01L2021/603 ,  H01L2224/75102 ,  H01L2224/75252 ,  H01L2224/75266 ,  H01L2224/75301 ,  H01L2224/75501 ,  H01L2224/75502 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/01008 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/0104 ,  H01L2924/01074 ,  H01L2924/0474 ,  H01L2924/0489 ,  H01L2924/04894 ,  H01L2924/05032 ,  H01L2924/0549 ,  Y10T29/49826

Abstract: Embodiments of a thermal compression bonding process bond head and a method for producing a thermal compression bonding process bond head are disclosed. In some embodiments, the bond head includes a thermal compression bonding process heater and a cooling block coupled to the heater through an annular structure. The annular structure surrounds a lower portion of the cooling block and couples the cooling block to the heater such that there is no direct mechanical contact between the cooling block and the heater.

Abstract translation: 公开了热压接工艺粘结头的实施例和用于制造热压接工艺粘合头的方法。 在一些实施例中，接合头包括热压接工艺加热器和通过环形结构联接到加热器的冷却块。 环形结构围绕冷却块的下部并且将冷却块连接到加热器，使得冷却块和加热器之间不存在直接的机械接触。

公开(公告)号：US11598804B2

公开(公告)日：2023-03-07

申请号：US16361816

申请日：2019-03-22

Applicant: Intel Corporation

Inventor： Jesse Armagost ,  Nathan Blackwell ,  Matthew Boelter ,  Geoffrey Kelly ,  James Neeb ,  Sundar Pathy ,  Yu Zhang ,  Shelby Rollins

IPC: G01R31/28 ,  G01R31/317 ,  G01R31/319

Abstract: Embodiments described herein may be directed to receiving a plurality of data captured, respectively, by a plurality of test instruments coupled to a device under test, wherein a plurality of data elements within, respectively, the plurality of captured data are associated with a timestamp based upon a time a data element was captured. Embodiments may also analyze the received plurality of data captured, respectively, by the one or more test instruments, and graphically display at least a portion of the analyzed plurality of captured data to a user. Other embodiments may be identified herein.

公开(公告)号：US20170103028A1

公开(公告)日：2017-04-13

申请号：US15270858

申请日：2016-09-20

Applicant: INTEL CORPORATION

Inventor： James Neeb ,  Bradly L. Inman ,  Nathan S. Blackwell

IPC: G06F13/16 ,  G06F11/07

CPC classification number: G06F13/1673 ,  G06F11/0745 ,  G06F11/0751 ,  G06F11/0772 ,  G06F11/079 ,  G06F11/221 ,  G06F13/382 ,  G06F13/4027

Abstract: Techniques and configurations are disclosed herein for communication between devices. In some embodiments, a bus for communication between first and second devices may include a transmit buffer and one or more processing devices. The one or more processing devices may be configured to receive first asynchronous data from an operating system, running on a central processing unit of the first device, on an operating system signal path; transmit the first asynchronous data from the first device to the second device on a command signal path; transmit first data from the transmit buffer to the second device at a first fixed packet frequency on a transmit signal path; and receive data from the second device at a second fixed packet frequency on a receive signal path different from the transmit signal path. Other embodiments may be disclosed and/or claimed.