公开(公告)号：US09362349B2

公开(公告)日：2016-06-07

申请号：US13923436

申请日：2013-06-21

Applicant: Infineon Technologies AG

Inventor： Dorothea Werber ,  Frank Pfirsch ,  Hans-Joachim Schulze ,  Carsten Schaeffer ,  Volodymyr Komarnitskyy ,  Anton Mauder ,  Holger Schulze ,  Gerhard Miller

IPC: H01L29/66 ,  H01L29/739 ,  H01L29/06 ,  H01L29/861 ,  H01L29/423 ,  H01L29/78 ,  H01L29/08 ,  H01L29/40 ,  H01L29/417 ,  H01L29/10

CPC classification number: H01L29/0615 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/423 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/8611

Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.

Abstract translation: 半导体器件包括具有至少一个器件单元的单元区域，其中至少一个器件单元包括第一导电类型的第一器件区域。 所述半导体器件还包括邻接所述至少一个器件单元的第一器件区域的第二导电类型的漂移区域，与所述漂移区域相邻的所述第一导电类型的掺杂区域以及被配置为减少电荷的电荷载流子寿命降低装置 在第一导电类型的掺杂区域中的载流子寿命。

公开(公告)号：US10325996B2

公开(公告)日：2019-06-18

申请号：US15724604

申请日：2017-10-04

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Franz Hirler ,  Anton Mauder ,  Helmut Strack ,  Frank Kahlmann ,  Gerhard Miller

IPC: H01L21/22 ,  H01L29/66 ,  H01L29/36 ,  H01L29/739 ,  H01L29/74 ,  H01L21/265 ,  H01L29/78 ,  H01L29/861 ,  H01L29/872 ,  H01L29/08 ,  H01L29/10 ,  H01L29/167 ,  H01L29/40 ,  H01L29/06 ,  H01L29/165

Abstract: A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.

公开(公告)号：US20180061962A1

公开(公告)日：2018-03-01

申请号：US15724604

申请日：2017-10-04

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Franz Hirler ,  Anton Mauder ,  Helmut Strack ,  Frank Kahlmann ,  Gerhard Miller

IPC: H01L29/66 ,  H01L29/872 ,  H01L29/861 ,  H01L21/265 ,  H01L29/08 ,  H01L29/10 ,  H01L29/167 ,  H01L29/36 ,  H01L29/739 ,  H01L29/78 ,  H01L29/74 ,  H01L29/40 ,  H01L29/06 ,  H01L29/165 ,  H01L21/22

CPC classification number: H01L29/66348 ,  H01L21/2205 ,  H01L21/2658 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0878 ,  H01L29/102 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/167 ,  H01L29/36 ,  H01L29/402 ,  H01L29/404 ,  H01L29/407 ,  H01L29/7397 ,  H01L29/7428 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7816 ,  H01L29/861 ,  H01L29/872

Abstract: A semiconductor device is produced by providing a semiconductor substrate, forming an epitaxial layer on the semiconductor substrate, and introducing dopant atoms of a first doping type and dopant atoms of a second doping type into the epitaxial layer.

公开(公告)号：US20140015007A1

公开(公告)日：2014-01-16

申请号：US13923436

申请日：2013-06-21

Applicant: Infineon Technologies AG

Inventor： Dorothea Werber ,  Frank Pfirsch ,  Hans-Joachim Schulze ,  Carsten Schaeffer ,  Volodymyr Komarnitskyy ,  Anton Mauder ,  Holger Schulze ,  Gerhard Miller

IPC: H01L29/06

CPC classification number: H01L29/0615 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/423 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/8611

Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.

Abstract translation: 半导体器件包括具有至少一个器件单元的单元区域，其中至少一个器件单元包括第一导电类型的第一器件区域。 所述半导体器件还包括邻接所述至少一个器件单元的第一器件区域的第二导电类型的漂移区域，与所述漂移区域相邻的所述第一导电类型的掺杂区域以及被配置为减少电荷的电荷载流子寿命降低装置 在第一导电类型的掺杂区域中的载流子寿命。