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公开(公告)号：US08323996B2
公开(公告)日：2012-12-04
申请号：US12396123
申请日：2009-03-02
Applicant: Adolf Koller , Horst Theuss
Inventor： Adolf Koller , Horst Theuss
CPC classification number: H01L23/492 , H01L21/76898 , H01L21/78 , H01L23/36 , H01L23/525 , H01L33/0079 , H01L33/46 , H01L2224/05001 , H01L2224/05008 , H01L2224/05111 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05548 , H01L2224/05569 , H01L2224/16 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/013 , H01L2924/0105 , H01L2924/01047 , H01L2924/01082
Abstract: A method of manufacturing a semiconductor device includes attaching a first semiconductor substrate to a support substrate, and thinning the first semiconductor substrate to form a thinned semiconductor layer. The method additionally includes integrating a functional element with the thinned semiconductor layer, and forming at least one through-connect through the thinned semiconductor layer.
Abstract translation: 一种制造半导体器件的方法包括将第一半导体衬底附接到支撑衬底，并且使第一半导体衬底变薄以形成变薄的半导体层。 该方法还包括将功能元件与减薄的半导体层集成，以及通过薄化的半导体层形成至少一个通孔连接。
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公开(公告)号：US20100264523A1
公开(公告)日：2010-10-21
申请号：US12828327
申请日：2010-07-01
Applicant: Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
Inventor： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
IPC: H01L23/552 , H01L23/485
CPC classification number: H01L23/552 , H01L23/3114 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/82 , H01L24/97 , H01L2224/05001 , H01L2224/05022 , H01L2224/05147 , H01L2224/05572 , H01L2224/05647 , H01L2224/16225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/12041 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , H01L2924/19107 , H01L2924/3025 , H01L2224/82 , H01L2924/00 , H01L2224/45099
Abstract: A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.
Abstract translation: 面板具有具有上部第一金属层和多个垂直半导体部件的基板。 每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。 半导体部件的第二面分别安装在基板的金属层上。 半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。 第二金属层布置在半导体部件之间的分离区域中。
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公开(公告)号：US20100221854A1
公开(公告)日：2010-09-02
申请号：US12396123
申请日：2009-03-02
Applicant: Adolf Koller , Horst Theuss
Inventor： Adolf Koller , Horst Theuss
CPC classification number: H01L23/492 , H01L21/76898 , H01L21/78 , H01L23/36 , H01L23/525 , H01L33/0079 , H01L33/46 , H01L2224/05001 , H01L2224/05008 , H01L2224/05111 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05548 , H01L2224/05569 , H01L2224/16 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/013 , H01L2924/0105 , H01L2924/01047 , H01L2924/01082
Abstract: A method of manufacturing a semiconductor device includes attaching a first semiconductor substrate to a support substrate, and thinning the first semiconductor substrate to form a thinned semiconductor layer. The method additionally includes integrating a functional element with the thinned semiconductor layer, and forming at least one through-connect through the thinned semiconductor layer.
Abstract translation: 一种制造半导体器件的方法包括将第一半导体衬底附接到支撑衬底，并且使第一半导体衬底变薄以形成变薄的半导体层。 该方法还包括将功能元件与减薄的半导体层集成，以及通过薄化的半导体层形成至少一个通孔连接。
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公开(公告)号：US08207018B2
公开(公告)日：2012-06-26
申请号：US12903482
申请日：2010-10-13
Applicant: Horst Theuss , Adolf Koller
Inventor： Horst Theuss , Adolf Koller
IPC: H01L21/00
CPC classification number: H05K3/3442 , H01L21/78 , H01L24/03 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/0657 , H01L2224/02371 , H01L2224/035 , H01L2224/0401 , H01L2224/04026 , H01L2224/05556 , H01L2224/05568 , H01L2224/05611 , H01L2224/05644 , H01L2224/29035 , H01L2224/29111 , H01L2224/32105 , H01L2224/83801 , H01L2224/83851 , H01L2924/0002 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/0106 , H01L2924/01068 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10156 , H05K2201/098 , H05K2201/10727 , Y02P70/613 , H01L2224/05552
Abstract: A semiconductor package is disclosed. One embodiment provides a semiconductor package singulated from a wafer includes a chip defining an active surface, a back side opposite the active surface, and peripheral sides extending between the active surface and the back side; a contact pad disposed on the active surface; and a metallization layer extending from the contact pad onto a portion of the peripheral sides of the chip.
Abstract translation: 公开了半导体封装。 一个实施例提供了从晶片单个化的半导体封装，其包括限定有源表面的芯片，与有源表面相对的后侧，以及在有源表面和背面之间延伸的周边; 设置在所述活动表面上的接触垫; 以及从接触垫延伸到芯片周边的一部分上的金属化层。
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公开(公告)号：US10107875B2
公开(公告)日：2018-10-23
申请号：US12627848
申请日：2009-11-30
Applicant: Klaus Elian , Martin Petz , Uwe Schindler , Horst Theuss , Adolf Koller
Inventor： Klaus Elian , Martin Petz , Uwe Schindler , Horst Theuss , Adolf Koller
Abstract: An integrated circuit includes a leadframe, and a die having a top surface, a bottom surface, and a plurality of perimeter sides and including at least one magnetic field sensor element disposed proximate to the top surface, wherein the bottom surface is bonded to the leadframe. A molded magnetic material encapsulates the die and at least a portion of the leadframe, and provides a magnetic field substantially perpendicular to the top surface of the die. A non-magnetic material is disposed between the die and the molded magnetic material at least along perimeter sides of the die intersecting a lateral magnetic field component which is parallel to the top surface of the die.
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Patent Agency Ranking
公开(公告)号：US20110027942A1
公开(公告)日：2011-02-03
申请号：US12903482
申请日：2010-10-13
Applicant: Horst Theuss , Adolf Koller
Inventor： Horst Theuss , Adolf Koller
IPC: H01L21/768
CPC classification number: H05K3/3442 , H01L21/78 , H01L24/03 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/0657 , H01L2224/02371 , H01L2224/035 , H01L2224/0401 , H01L2224/04026 , H01L2224/05556 , H01L2224/05568 , H01L2224/05611 , H01L2224/05644 , H01L2224/29035 , H01L2224/29111 , H01L2224/32105 , H01L2224/83801 , H01L2224/83851 , H01L2924/0002 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/0106 , H01L2924/01068 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10156 , H05K2201/098 , H05K2201/10727 , Y02P70/613 , H01L2224/05552
Abstract: A semiconductor package is disclosed. One embodiment provides a semiconductor package singulated from a wafer includes a chip defining an active surface, a back side opposite the active surface, and peripheral sides extending between the active surface and the back side; a contact pad disposed on the active surface; and a metallization layer extending from the contact pad onto a portion of the peripheral sides of the chip.
Abstract translation: 公开了半导体封装。 一个实施例提供了从晶片单个化的半导体封装，其包括限定有源表面的芯片，与有源表面相对的后侧，以及在有源表面和背面之间延伸的周边; 设置在所述活动表面上的接触垫; 以及从接触垫延伸到芯片周边的一部分上的金属化层。
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公开(公告)号：US07830022B2
公开(公告)日：2010-11-09
申请号：US11876241
申请日：2007-10-22
Applicant: Horst Theuss , Adolf Koller
Inventor： Horst Theuss , Adolf Koller
CPC classification number: H05K3/3442 , H01L21/78 , H01L24/03 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/0657 , H01L2224/02371 , H01L2224/035 , H01L2224/0401 , H01L2224/04026 , H01L2224/05556 , H01L2224/05568 , H01L2224/05611 , H01L2224/05644 , H01L2224/29035 , H01L2224/29111 , H01L2224/32105 , H01L2224/83801 , H01L2224/83851 , H01L2924/0002 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/0106 , H01L2924/01068 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10156 , H05K2201/098 , H05K2201/10727 , Y02P70/613 , H01L2224/05552
Abstract: A semiconductor package is disclosed. One embodiment provides a semiconductor package singulated from a wafer includes a chip defining an active surface, a back side opposite the active surface, and peripheral sides extending between the active surface and the back side; a contact pad disposed on the active surface; and a metallization layer extending from the contact pad onto a portion of the peripheral sides of the chip.
Abstract translation: 公开了半导体封装。 一个实施例提供了从晶片单个化的半导体封装，其包括限定有源表面的芯片，与有源表面相对的后侧，以及在有源表面和背面之间延伸的周边; 设置在所述活动表面上的接触垫; 以及从接触垫延伸到芯片周边的一部分上的金属化层。
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公开(公告)号：US07772693B2
公开(公告)日：2010-08-10
申请号：US11677774
申请日：2007-02-22
Applicant: Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
Inventor： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
IPC: H01L23/34
CPC classification number: H01L23/552 , H01L23/3114 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/82 , H01L24/97 , H01L2224/05001 , H01L2224/05022 , H01L2224/05147 , H01L2224/05572 , H01L2224/05647 , H01L2224/16225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/12041 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , H01L2924/19107 , H01L2924/3025 , H01L2224/82 , H01L2924/00 , H01L2224/45099
Abstract: A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.
Abstract translation: 面板具有具有上部第一金属层和多个垂直半导体部件的基板。 每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。 半导体部件的第二面分别安装在基板的金属层上。 半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。 第二金属层布置在半导体部件之间的分离区域中。
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公开(公告)号：US20090102054A1
公开(公告)日：2009-04-23
申请号：US11876241
申请日：2007-10-22
Applicant: Horst Theuss , Adolf Koller
Inventor： Horst Theuss , Adolf Koller
IPC: H01L23/488 , H01L21/304
CPC classification number: H05K3/3442 , H01L21/78 , H01L24/03 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/0657 , H01L2224/02371 , H01L2224/035 , H01L2224/0401 , H01L2224/04026 , H01L2224/05556 , H01L2224/05568 , H01L2224/05611 , H01L2224/05644 , H01L2224/29035 , H01L2224/29111 , H01L2224/32105 , H01L2224/83801 , H01L2224/83851 , H01L2924/0002 , H01L2924/01013 , H01L2924/01033 , H01L2924/0105 , H01L2924/0106 , H01L2924/01068 , H01L2924/01074 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10156 , H05K2201/098 , H05K2201/10727 , Y02P70/613 , H01L2224/05552
Abstract: A semiconductor package is disclosed. One embodiment provides a semiconductor package singulated from a wafer includes a chip defining an active surface, a back side opposite the active surface, and peripheral sides extending between the active surface and the back side; a contact pad disposed on the active surface; and a metallization layer extending from the contact pad onto a portion of the peripheral sides of the chip.
Abstract translation: 公开了半导体封装。 一个实施例提供了从晶片单个化的半导体封装，其包括限定有源表面的芯片，与有源表面相对的后侧，以及在有源表面和背面之间延伸的周边; 设置在所述活动表面上的接触垫; 以及从接触垫延伸到芯片周边的一部分上的金属化层。
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公开(公告)号：US20080191359A1
公开(公告)日：2008-08-14
申请号：US11677774
申请日：2007-02-22
Applicant: Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
Inventor： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
CPC classification number: H01L23/552 , H01L23/3114 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/82 , H01L24/97 , H01L2224/05001 , H01L2224/05022 , H01L2224/05147 , H01L2224/05572 , H01L2224/05647 , H01L2224/16225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/12041 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , H01L2924/19107 , H01L2924/3025 , H01L2224/82 , H01L2924/00 , H01L2224/45099
Abstract: A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.
Abstract translation: 面板具有具有上部第一金属层和多个垂直半导体部件的基板。 每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。 半导体部件的第二面分别安装在基板的金属层上。 半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。 第二金属层布置在半导体部件之间的分离区域中。
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