公开(公告)号：US08871970B2

公开(公告)日：2014-10-28

申请号：US12998715

申请日：2009-12-25

Applicant: Hiroki Inoue

Inventor： Hiroki Inoue

IPC: C07F5/02 ,  C07C217/08 ,  C07F1/02

CPC classification number: C07C217/08 ,  C07C211/14 ,  C07F1/02 ,  C07F5/025

Abstract: A method for producing an organolithium compound includes the step of reacting an aromatic compound or a halogenated unsaturated aliphatic compound and a lithiating agent in the presence of a coordinating compound containing three or more elements having a coordinating ability in a molecule, at least one thereof being a nitrogen element, or a coordinating compound containing three or more oxygen elements having a coordinating ability in a molecule, at least one of the groups containing the oxygen elements having a coordinating ability being a tertiary alkoxy group, at a temperature of −40° C. to 40° C.

Abstract translation: 有机锂化合物的制造方法包括使芳香族化合物或卤化不饱和脂肪族化合物与锂化剂在含有分子中具有配位能力的三种以上的配位化合物的存在下反应的工序，其中至少一个为 氮元素或含有三个或更多个在分子中具有配位能力的氧元素的配位化合物，至少一个含有具有叔烷氧基的配位能力的氧元素的基团在-40℃的温度下 至40℃

公开(公告)号：US20140118278A1

公开(公告)日：2014-05-01

申请号：US14063089

申请日：2013-10-25

Applicant: Hiroki Inoue

Inventor： Hiroki Inoue

IPC: G06F3/0488

CPC classification number: G06F3/04883 ,  G06F3/03545 ,  G06F3/041

Abstract: An information management apparatus includes a processor, and a memory configured to store computer-readable instructions. The instructions instruct the information management apparatus to execute steps including acquiring stroke data of a trajectory of an approaching writing device detected by a detection portion capable of detecting the trajectory and including data of the trajectory of the writing device corresponding to schedule information written on a paper medium, generating image data of the trajectory based on the acquired stroke data, generating text data based on the acquired stroke data, and registering and managing the schedule information identified from the text data and the image data.

Abstract translation: 信息管理装置包括处理器和被配置为存储计算机可读指令的存储器。 所述指示指示所述信息管理装置执行包括获取能够检测所述轨迹的检测部检测到的接近写入装置的轨迹的笔迹数据的步骤，并且包括与写在纸张上的时间表信息对应的写入装置的轨迹的数据 基于所获取的笔画数据生成轨迹的图像数据，基于所获取的笔画数据生成文本数据，以及登记和管理从文本数据和图像数据识别的日程信息。

公开(公告)号：US08587286B2

公开(公告)日：2013-11-19

申请号：US12686579

申请日：2010-01-13

Applicant: Hiroki Inoue ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Koichiro Kamata ,  Tsutomu Murakawa ,  Takahiro Tuji ,  Kaori Ikada

Inventor： Hiroki Inoue ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Koichiro Kamata ,  Tsutomu Murakawa ,  Takahiro Tuji ,  Kaori Ikada

IPC: G05F3/16 ,  G05F1/00

CPC classification number: G05F3/16 ,  G05F1/56 ,  G05F3/242

Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.

Abstract translation: 本发明的一个目的是提供一种具有改善的噪声容限的调节器电路。 在包括基于第一电源端子和第二电源端子之间的电位差产生参考电压的偏置电路的调节器电路中，以及基于参考电位向输出端子输出电位的电压调节器 在偏置电路的输入端，在电源端子与偏置电路中包含的晶体管的栅极连接的节点之间设置有旁路电容器。

公开(公告)号：US08563973B2

公开(公告)日：2013-10-22

申请号：US13041581

申请日：2011-03-07

Applicant: Hiroki Inoue ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

Inventor： Hiroki Inoue ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

IPC: H01L29/786

CPC classification number: H01L27/11521 ,  G11C16/0408 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225 ,  H01L28/60

Abstract: A semiconductor device including a nonvolatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that a predetermined amount of charge is held at the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.

Abstract translation: 提供一种半导体器件，其包括包括具有氧化物半导体的写入晶体管的非易失性存储单元，包括与写入晶体管不同的半导体材料的读取晶体管和电容器。 通过接通写入晶体管并将电位提供给写入晶体管的源极（或电极），电容器的一个电极和读取晶体管的栅电极的节点，将数据写入存储单元 彼此电连接，然后关闭写入晶体管，使得在节点处保持预定量的电荷。 此外，当使用p沟道晶体管作为读取晶体管时，读取电位为正电位。

公开(公告)号：US08502292B2

公开(公告)日：2013-08-06

申请号：US13182488

申请日：2011-07-14

Applicant: Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka ,  Hiroki Inoue

Inventor： Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka ,  Hiroki Inoue

IPC: H01L27/108 ,  H01L29/94

CPC classification number: H01L27/11517 ,  G11C16/0433 ,  G11C16/26 ,  H01L27/1156 ,  H01L29/78

Abstract: A semiconductor device with a novel structure is provided, which can hold stored data even when no power is supplied and which has no limitations on the number of writing operations. A semiconductor device is formed using a material which enables off-state current of a transistor to be reduced significantly; e.g., an oxide semiconductor material which is a wide-gap semiconductor. With use of a semiconductor material which enables off-state current of a transistor to be reduced significantly, the semiconductor device can hold data for a long period. In a semiconductor device with a memory cell array, parasitic capacitances generated in the nodes of the first to the m-th memory cells connected in series are substantially equal, whereby the semiconductor device can operate stably.

Abstract translation: 提供具有新颖结构的半导体器件，其即使在没有供电的情况下也可以保存存储的数据，并且对写入操作的数量没有限制。 使用能够显着降低晶体管的截止电流的材料形成半导体器件; 例如，作为宽间隙半导体的氧化物半导体材料。 通过使用能够显着降低晶体管的截止电流的半导体材料，半导体器件可以长期保存数据。 在具有存储单元阵列的半导体器件中，在串联连接的第一至第m存储器单元的节点中产生的寄生电容基本相等，由此半导体器件可以稳定地工作。

公开(公告)号：US08488394B2

公开(公告)日：2013-07-16

申请号：US13197839

申请日：2011-08-04

Applicant: Shuhei Nagatsuka ,  Takanori Matsuzaki ,  Hiroki Inoue ,  Kiyoshi Kato

Inventor： Shuhei Nagatsuka ,  Takanori Matsuzaki ,  Hiroki Inoue ,  Kiyoshi Kato

IPC: G11C7/00

CPC classification number: G11C7/00 ,  G11C11/403 ,  G11C11/4087 ,  H01L27/11517 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225

Abstract: An object is to provide a semiconductor device with a novel structure, which can hold stored data even when power is not supplied and which has an unlimited number of write cycles. The semiconductor device is formed using a memory cell including a wide band gap semiconductor such as an oxide semiconductor. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference potential for reading data from the memory cell. When the wide band gap semiconductor which allows a sufficient reduction in off-state current of a transistor included in the memory cell is used, a semiconductor device which can hold data for a long period can be provided.

Abstract translation: 目的是提供具有新颖结构的半导体器件，其即使在不提供电力且具有无限数量的写周期的情况下也可以保存存储的数据。 使用包括诸如氧化物半导体的宽带隙半导体的存储单元形成半导体器件。 半导体器件包括具有输出低于用于从存储单元读取数据的参考电位的电位的功能的电位变化电路。 当使用允许充分降低包含在存储单元中的晶体管的截止电流的宽带隙半导体时，可以提供能够长期保存数据的半导体器件。

公开(公告)号：US08411480B2

公开(公告)日：2013-04-02

申请号：US13082464

申请日：2011-04-08

Applicant: Shuhei Nagatsuka ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Hiroki Inoue

Inventor： Shuhei Nagatsuka ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Hiroki Inoue

IPC: G11C5/06

CPC classification number: G11C11/4093 ,  G11C11/405 ,  G11C11/4074 ,  G11C11/4085 ,  G11C11/4096 ,  H01L27/1156 ,  H01L27/1203

Abstract: An object is to provide a semiconductor device having a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device includes a memory cell including a widegap semiconductor, for example, an oxide semiconductor. The memory cell includes a writing transistor, a reading transistor, and a selecting transistor. Using a widegap semiconductor, a semiconductor device capable of sufficiently reducing the off-state current of a transistor included in a memory cell and holding data for a long time can be provided.

Abstract translation: 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也能够保存存储的数据。 半导体器件包括具有宽栅半导体的存储单元，例如氧化物半导体。 存储单元包括写入晶体管，读取晶体管和选择晶体管。 使用宽栅半导体，可以提供能够充分降低存储单元中包含的晶体管的截止电流并长时间保持数据的半导体器件。

公开(公告)号：US20120294070A1

公开(公告)日：2012-11-22

申请号：US13473752

申请日：2012-05-17

Applicant: Takanori Matsuzaki ,  Hiroki Inoue ,  Shuhei Nagatsuka

Inventor： Takanori Matsuzaki ,  Hiroki Inoue ,  Shuhei Nagatsuka

IPC: G11C11/24

CPC classification number: G11C11/404 ,  G11C16/0433 ,  H01L27/1156 ,  H01L27/1225 ,  H01L27/1255

Abstract: A semiconductor device includes a nonvolatile memory cell including a writing transistor including an oxide semiconductor, a reading transistor including a semiconductor material different from that of the writing transistor, and a capacitor. Data is written to the memory cell by turning on the writing transistor so that a potential is supplied to a node where a source electrode of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined potential is held in the node. Data is read out from the memory cell by supplying a precharge potential to a bit line, stopping the supply of the potential to the bit line, and determining whether the potential of the bit line is kept at the precharge potential or decreased.

Abstract translation: 半导体器件包括：非易失性存储单元，包括具有氧化物半导体的写入晶体管，包括与写入晶体管不同的半导体材料的读取晶体管，以及电容器。 通过接通写入晶体管将数据写入存储单元，使得电位被提供给写入晶体管的源电极，电容器的一个电极和读取晶体管的栅极电连接的节点，以及 然后关闭写入晶体管，使得在节点中保持预定的电位。 通过向位线提供预充电电位，停止对位线的电位供给，以及确定位线的电位是否保持在预充电电位还是减小，从存储单元读出数据。

公开(公告)号：US20120273800A1

公开(公告)日：2012-11-01

申请号：US13395494

申请日：2011-06-17

Applicant: Tsutomu Hori ,  Shin Harada ,  Hiroki Inoue ,  Makoto Sasaki ,  Satomi Itoh ,  Yasuo Namikawa

Inventor： Tsutomu Hori ,  Shin Harada ,  Hiroki Inoue ,  Makoto Sasaki ,  Satomi Itoh ,  Yasuo Namikawa

IPC: H01L29/24

CPC classification number: H01L29/7802 ,  H01L21/02002 ,  H01L21/02529 ,  H01L21/02609 ,  H01L21/02667 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/66068

Abstract: A first vertex of a first single-crystal silicon carbide substrate and a second vertex of a second single-crystal silicon carbide substrate abut each other such that a first side of the first single-crystal silicon carbide substrate and a second side of the second single-crystal silicon carbide substrate are aligned. In addition, at least a part of the first side and at least a part of the second side abut on a third side of a third single-crystal silicon carbide substrate. Thus, in manufacturing a semiconductor device including a composite substrate, process fluctuations caused by a gap between the single-crystal silicon carbide substrates can be suppressed.

Abstract translation: 第一单晶碳化硅衬底的第一顶点和第二单晶碳化硅衬底的第二顶点彼此邻接，使得第一单晶碳化硅衬底的第一侧和第二单晶碳化硅衬底的第二侧 - 晶体碳化硅衬底被对准。 此外，第一侧的至少一部分和第二侧的至少一部分与第三单晶碳化硅基板的第三面邻接。 因此，在制造包括复合衬底的半导体器件时，可以抑制由单晶碳化硅衬底之间的间隙引起的工艺波动。

公开(公告)号：US08247491B2

公开(公告)日：2012-08-21

申请号：US10544348

申请日：2004-02-06

Applicant: Kazushi Torii ,  Yoshiro Mitsukami ,  Motohiro Imura ,  Taku Iwamura ,  Toshimasa Kitayama ,  Kenji Kadonaga ,  Hiroki Inoue ,  Koji Miyake ,  Kozo Nogi ,  Masatoshi Nakamura ,  Shigeru Sakamoto ,  Sayaka Machida

Inventor： Kazushi Torii ,  Yoshiro Mitsukami ,  Motohiro Imura ,  Taku Iwamura ,  Toshimasa Kitayama ,  Kenji Kadonaga ,  Hiroki Inoue ,  Koji Miyake ,  Kozo Nogi ,  Masatoshi Nakamura ,  Shigeru Sakamoto ,  Sayaka Machida

IPC: C08L33/02 ,  C08L31/00 ,  C08L29/04 ,  C08F20/06 ,  C08K3/22

CPC classification number: A61L15/60

Abstract: There are disclosed a water-absorbent resin composition and its production process, wherein the water-absorbent resin composition causes little gel-blocking and is excellent in the liquid permeability and liquid diffusibility and is high also in the absorption performances and further is strong also against the physical damage; and there are further disclosed a water-absorbent resin composition and its production process, wherein the water-absorbent resin composition has the following further advantages, in addition to the above, of involving little segregation of the metal compound and further having a dust prevention effect. One of water-absorbent resin compositions according to the present invention is a water-absorbent resin composition comprising water-absorbent resin particles obtained by polymerizing a monomer including acrylic acid and/or its salt, with the composition having a mass-average particle diameter of 100 to 600 μm and comprising water-soluble polyvalent metal salt particles and the water-absorbent resin particles that have been surface-crosslinked.

Abstract translation: 公开了吸水性树脂组合物及其制造方法，其中吸水性树脂组合物几乎没有凝胶阻塞，并且液体渗透性和液体扩散性优异，并且吸收性能也高，并且还强 物理伤害; 并且还公开了一种吸水性树脂组合物及其制造方法，其中除了上述之外，吸水性树脂组合物具有以下进一步的优点，即涉及金属化合物几乎不偏析并且还具有防尘效果 。 根据本发明的吸水性树脂组合物之一是吸收性树脂组合物，其包含通过使包含丙烯酸和/或其盐的单体聚合而获得的吸水性树脂颗粒，其组成物的质量平均粒径为 100〜600μm，并且包含水溶性多价金属盐颗粒和表面交联的吸水性树脂颗粒。