公开(公告)号：US08154110B2

公开(公告)日：2012-04-10

申请号：US12093708

申请日：2006-11-02

申请人： Masamichi Ishihara ,  Harufumi Kobayashi

发明人： Masamichi Ishihara ,  Harufumi Kobayashi

IPC分类号： H01L23/34

CPC分类号： H01L23/3107 ,  H01L21/4842 ,  H01L23/49548 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A dual-face package has an LSI chip sealed with a mold resin, and electrodes for external connections on both of the front face and the back face. The LSI chip is bonded onto the die pad of a leadframe whose outer lead portions are exposed as back-face electrodes at least the back face. The LSI chip and a plurality of inner lead portions of the leadframe are connected by wiring. At least some of the plurality of inner lead portions have front-face electrodes integrally formed by working a portion of the leadframe. Head faces of the front-face electrodes, or bump electrodes connected to the respective head faces of the front-face electrodes serve as electrodes for external connections to another substrate, element, or the like.

摘要翻译： 双面包装具有用模制树脂密封的LSI芯片，以及在前表面和背面两者上的用于外部连接的电极。 LSI芯片被接合到引线框架的芯片焊盘上，引线框架的外部引线部分至少暴露在背面电极的背面。 引线框架的LSI芯片和多个内部引线部分通过布线连接。 多个内部引线部分中的至少一些具有通过对引线框架的一部分进行加工而一体形成的正面电极。 连接到前面电极的各个头表面的前面电极或凸起电极的头表面用作用于与另一衬底，元件等的外部连接的电极。

公开(公告)号：US20090321266A1

公开(公告)日：2009-12-31

申请号：US12490470

申请日：2009-06-24

申请人： Yoshimi Egawa ,  Harufumi Kobayashi

发明人： Yoshimi Egawa ,  Harufumi Kobayashi

IPC分类号： H05K3/00

CPC分类号： H05K3/242 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H05K1/111 ,  H05K1/114 ,  H05K3/06 ,  H05K3/42 ,  H05K2201/09254 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2203/1572 ,  H05K2203/175 ,  Y10T29/49156 ,  Y10T29/49162 ,  H01L2924/00014

摘要： There is provided a method for manufacturing a printed circuit board having an insulative board and a plurality of electroconductive pads arranged in a grid shape on the insulative board, the method comprising: a step for forming an electroconductive film on the insulative board; a step for forming a pattern on the electroconductive film so as to form the electroconductive pads, a lead wire connected to at least one of the electroconductive pads, and inter-pad wiring for electrically connecting each of the electroconductive pads not connected to the lead wire to any of the electroconductive pads connected to the lead wire, the inter-pad wiring being disposed between mutually adjacent electroconductive pads; a step for plating each of the electroconductive pads by immersing the insulative board in a plating bath and energizing each of the electroconductive pads through the lead wire; and a step for removing the inter-pad wiring.

摘要翻译： 提供了一种用于制造印刷电路板的方法，所述印刷电路板具有绝缘板和在所述绝缘板上排列成格子状的多个导电焊盘，所述方法包括：在所述绝缘板上形成导电膜的步骤; 用于在导电膜上形成图形以形成导电焊盘的步骤，连接到至少一个导电焊盘的引线和用于电连接未连接到引线的每个导电焊盘的衬垫布线 连接到引线的任何导电焊盘，衬垫布线设置在相互相邻的导电焊盘之间; 通过将绝缘板浸入电镀槽中并对每个导电焊盘进行电镀，并通过引线激励每个导电焊盘; 以及去除垫间布线的步骤。

公开(公告)号：US06653218B2

公开(公告)日：2003-11-25

申请号：US10287532

申请日：2002-11-05

申请人： Shinji Ohuchi ,  Harufumi Kobayashi ,  Yasushi Shiraishi

发明人： Shinji Ohuchi ,  Harufumi Kobayashi ,  Yasushi Shiraishi

IPC分类号： H01L2144

CPC分类号： H01L24/16 ,  H01L21/76885 ,  H01L21/78 ,  H01L23/3171 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/05647 ,  H01L2224/1148 ,  H01L2224/13006 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/274 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2224/13099 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00014

摘要： A polyimide layer is formed over a semiconductor chip, a rewiring to be connected to each of the electrode pads of the semiconductor chip is formed over the polyimide layer, and a post serving as a terminal is connected to each of the electrode pads via the rewiring, thereby redisposing the electrode pads. A resin for encapsulating the rewirings and the posts is formed on the surface of the semiconductor chip to the extent equivalent to the dimension of the semiconductor chip, and in a groove formed in portions of the resin, around the respective posts, the topmost surface and the sidewall face of the respective posts are exposed out of the resin.

公开(公告)号：US08501542B2

公开(公告)日：2013-08-06

申请号：US13412128

申请日：2012-03-05

申请人： Masamichi Ishihara ,  Harufumi Kobayashi

发明人： Masamichi Ishihara ,  Harufumi Kobayashi

IPC分类号： H01L21/50

CPC分类号： H01L23/3107 ,  H01L21/4842 ,  H01L23/49548 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A dual-face package has an LSI chip sealed with a mold resin, and electrodes for external connections on both of the front face and the back face. The LSI chip is bonded onto the die pad of a leadframe whose outer lead portions are exposed as back-face electrodes at at least the back face. The LSI chip and a plurality of inner lead portions of the leadframe are connected by wiring. At least some of the plurality of inner lead portions have front-face electrodes integrally formed by working a portion of the leadframe. Head faces of the front-face electrodes, or bump electrodes connected to the respective head faces of the front-face electrodes serve as electrodes for external connections to another substrate, element, or the like.

摘要翻译： 双面包装具有用模制树脂密封的LSI芯片，以及在前表面和背面两者上的用于外部连接的电极。 LSI芯片被接合到引线框架的芯片焊盘上，引线框架的外部引线部分至少在背面被暴露为背面电极。 引线框架的LSI芯片和多个内部引线部分通过布线连接。 多个内部引线部分中的至少一些具有通过对引线框架的一部分进行加工而一体形成的正面电极。 连接到前面电极的各个头表面的前面电极或凸起电极的头表面用作用于与另一衬底，元件等的外部连接的电极。

公开(公告)号：US20120164790A1

公开(公告)日：2012-06-28

申请号：US13412128

申请日：2012-03-05

申请人： Masamichi Ishihara ,  Harufumi Kobayashi

发明人： Masamichi Ishihara ,  Harufumi Kobayashi

IPC分类号： H01L21/78 ,  H01L21/60

CPC分类号： H01L23/3107 ,  H01L21/4842 ,  H01L23/49548 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A dual-face package has an LSI chip sealed with a mold resin, and electrodes for external connections on both of the front face and the back face. The LSI chip is bonded onto the die pad of a leadframe whose outer lead portions are exposed as back-face electrodes at at least the back face. The LSI chip and a plurality of inner lead portions of the leadframe are connected by wiring. At least some of the plurality of inner lead portions have front-face electrodes integrally formed by working a portion of the leadframe. Head faces of the front-face electrodes, or bump electrodes connected to the respective head faces of the front-face electrodes serve as electrodes for external connections to another substrate, element, or the like.

摘要翻译： 双面包装具有用模制树脂密封的LSI芯片，以及在前表面和背面两者上的用于外部连接的电极。 LSI芯片被接合到引线框架的芯片焊盘上，引线框架的外部引线部分至少在背面被暴露为背面电极。 引线框架的LSI芯片和多个内部引线部分通过布线连接。 多个内部引线部分中的至少一些具有通过对引线框架的一部分进行加工而一体形成的正面电极。 连接到前面电极的各个头表面的前面电极或凸起电极的头表面用作用于与另一衬底，元件等的外部连接的电极。

公开(公告)号：US06573598B2

公开(公告)日：2003-06-03

申请号：US09542291

申请日：2000-04-04

申请人： Shinji Ohuchi ,  Harufumi Kobayashi ,  Yasushi Shiraishi

发明人： Shinji Ohuchi ,  Harufumi Kobayashi ,  Yasushi Shiraishi

IPC分类号： H01L2348

CPC分类号： H01L24/14 ,  H01L21/78 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0384 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05541 ,  H01L2224/05556 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/05647 ,  H01L2224/06505 ,  H01L2224/10145 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/14 ,  H01L2224/14051 ,  H01L2224/1413 ,  H01L2224/14505 ,  H01L2224/14515 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/01014 ,  H01L2224/13099 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device is disclosed which includes a semiconductor chip having a plurality of electrode pads on its upper surface; terminals such as copper posts formed on the upper surface of the semiconductor chip, and electrically connected to each of the electrode pads; a resin deposited on the upper surface of the semiconductor chip, encapsulating the terminals but exposing at least some of them to a predetermined height; and electroconductor members such as solder balls connected to the terminals. There is also disclosed a method of fabricating such a semiconductor device.

摘要翻译： 公开了一种半导体器件，其包括在其上表面上具有多个电极焊盘的半导体芯片; 端子，例如形成在半导体芯片的上表面上的铜柱，并且电连接到每个电极焊盘; 沉积在半导体芯片的上表面上的树脂，封装端子，但将其中的至少一些暴露于预定高度; 以及连接到端子的诸如焊球的电导体构件。 还公开了一种制造这种半导体器件的方法。

公开(公告)号：US06369440B1

公开(公告)日：2002-04-09

申请号：US09265406

申请日：1999-03-10

申请人： Harufumi Kobayashi

发明人： Harufumi Kobayashi

IPC分类号： H01L2312

CPC分类号： H01L24/97 ,  H01L21/6835 ,  H01L2221/68377 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/00012

摘要： A semiconductor apparatus substrate according to the present invention has a substrate, a piece-substrate that has been punched out of the substrate and pushed back to the original position, an opening unit formed in a region of the substrate that substantially surrounds the piece-substrate, and a support unit installed inside the opening unit. As a result of this configuration, in transporting the semiconductor apparatus substrate after the piece-substrate has been pushed back, the piece-substrate is prevented from falling off the semiconductor apparatus substrate.

摘要翻译： 根据本发明的半导体装置基板具有：基板，从基板冲出并推回到原来位置的单片基板，形成在基板周围基本上包围片基板的开口单元 以及安装在开口单元内的支撑单元。 作为该结构的结果，在片状基板被推回之后输送半导体装置基板时，防止了单片基板从半导体装置基板脱落。

公开(公告)号：US08500984B2

公开(公告)日：2013-08-06

申请号：US12490470

申请日：2009-06-24

申请人： Yoshimi Egawa ,  Harufumi Kobayashi

发明人： Yoshimi Egawa ,  Harufumi Kobayashi

IPC分类号： C25D5/02 ,  H05K3/02 ,  H01K3/10

CPC分类号： H05K3/242 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/15311 ,  H05K1/111 ,  H05K1/114 ,  H05K3/06 ,  H05K3/42 ,  H05K2201/09254 ,  H05K2201/10719 ,  H05K2201/10734 ,  H05K2203/1572 ,  H05K2203/175 ,  Y10T29/49156 ,  Y10T29/49162 ,  H01L2924/00014

摘要： A method for manufacturing a printed circuit board having an insulative board and a plurality of electroconductive pads arranged in a grid shape on the insulative board, the method including a step for forming an electroconductive film on the insulative board; a step for forming a pattern on the electroconductive film so as to form the electroconductive pads, a lead wire connected to at least one of the electroconductive pads, and inter-pad wiring for electrically connecting each of the electroconductive pads not connected to the lead wire to any of the electroconductive pads connected to the lead wire, the inter-pad wiring being disposed between mutually adjacent electroconductive pads; a step for plating each of the electroconductive pads by immersing the insulative board in a plating bath and energizing each of the electroconductive pads through the lead wire; and a step for removing the inter-pad wiring.

摘要翻译： 一种用于制造印刷电路板的方法，所述印刷电路板具有绝缘板和在所述绝缘板上排列成格子状的多个导电焊盘，所述方法包括在所述绝缘板上形成导电膜的步骤; 用于在导电膜上形成图形以形成导电焊盘的步骤，连接到至少一个导电焊盘的引线和用于电连接未连接到引线的每个导电焊盘的衬垫布线 连接到引线的任何导电焊盘，衬垫布线设置在相互相邻的导电焊盘之间; 通过将绝缘板浸入电镀槽中并对每个导电焊盘进行电镀，并通过引线激励每个导电焊盘; 以及去除垫间布线的步骤。

公开(公告)号：US20090224381A1

公开(公告)日：2009-09-10

申请号：US12093708

申请日：2006-11-02

申请人： Masamichi Ishihara ,  Harufumi Kobayashi

发明人： Masamichi Ishihara ,  Harufumi Kobayashi

IPC分类号： H01L23/495 ,  H01L21/78 ,  H01L21/98

CPC分类号： H01L23/3107 ,  H01L21/4842 ,  H01L23/49548 ,  H01L23/49551 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A dual-face package has an LSI chip sealed with a mold resin, and electrodes for external connections on both of the front face and the back face. The LSI chip is bonded onto the die pad of a leadframe whose outer lead portions are exposed as back-face electrodes at least the back face. The LSI chip and a plurality of inner lead portions of the leadframe are connected by wiring. At least some of the plurality of inner lead portions have front-face electrodes integrally formed by working a portion of the leadframe. Head faces of the front-face electrodes, or bump electrodes connected to the respective head faces of the front-face electrodes serve as electrodes for external connections to another substrate, element, or the like.

摘要翻译： 双面包装具有用模制树脂密封的LSI芯片，以及在前表面和背面两者上的用于外部连接的电极。 LSI芯片被接合到引线框架的芯片焊盘上，引线框架的外部引线部分至少暴露在背面电极的背面。 引线框架的LSI芯片和多个内部引线部分通过布线连接。 多个内部引线部分中的至少一些具有通过对引线框架的一部分进行加工而一体形成的正面电极。 连接到前面电极的各个头表面的前面电极或凸起电极的头表面用作用于与另一衬底，元件等的外部连接的电极。

公开(公告)号：US06852564B2

公开(公告)日：2005-02-08

申请号：US10304767

申请日：2002-11-27

申请人： Shinji Ohuchi ,  Harufumi Kobayashi ,  Yasushi Shiraishi

发明人： Shinji Ohuchi ,  Harufumi Kobayashi ,  Yasushi Shiraishi

IPC分类号： H01L23/12 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768 ,  H01L21/78 ,  H01L23/485 ,  H01L21/00

CPC分类号： H01L24/14 ,  H01L21/78 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0384 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05541 ,  H01L2224/05556 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/05647 ,  H01L2224/06505 ,  H01L2224/10145 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/14 ,  H01L2224/14051 ,  H01L2224/1413 ,  H01L2224/14505 ,  H01L2224/14515 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/01014 ,  H01L2224/13099 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device is disclosed which includes a semiconductor chip having a plurality of electrode pads on its upper surface; terminals such as copper posts formed on the upper surface of the semiconductor chip, and electrically connected to each of the electrode pads; a resin deposited on the upper surface of the semiconductor chip, encapsulating the terminals but exposing at least some of them to a predetermined height; and electroconductor members such as solder balls connected to the terminals. There is also disclosed a method of fabricating such a semiconductor device.

摘要翻译： 公开了一种半导体器件，其包括在其上表面上具有多个电极焊盘的半导体芯片; 端子，例如形成在半导体芯片的上表面上的铜柱，并且电连接到每个电极焊盘; 沉积在半导体芯片的上表面上的树脂，封装端子，但将其中的至少一些暴露于预定高度; 以及连接到端子的诸如焊球的电导体构件。 还公开了一种制造这种半导体器件的方法。