FERROELECTRIC MEMORY USING MULTIFERROICS
    1.
    发明申请
    FERROELECTRIC MEMORY USING MULTIFERROICS 失效
    使用多媒体的电磁记忆

    公开(公告)号:US20090315088A1

    公开(公告)日:2009-12-24

    申请号:US12144697

    申请日:2008-06-24

    IPC分类号: H01L29/00

    摘要: Ferroelectric memory using multiferroics is described. The multiferrroic memory includes a substrate having a source region, a drain region and a channel region separating the source region and the drain region. An electrically insulating layer is adjacent to the source region, drain region and channel region. A data storage cell having a composite multiferroic layer is adjacent to the electrically insulating layer. The electrically insulating layer separated the data storage cell form the channel region. A control gate electrode is adjacent to the data storage cell. The data storage cell separates at least a portion of the control gate electrode from the electrically insulating layer.

    摘要翻译: 描述了使用多铁性的铁电存储器。 多层存储器包括具有源极区,漏极区和分离源极区和漏极区的沟道区的衬底。 电绝缘层与源极区,漏极区和沟道区相邻。 具有复合多铁层的数据存储单元与电绝缘层相邻。 电绝缘层从通道区域分离数据存储单元。 控制栅电极与数据存储单元相邻。 数据存储单元将控制栅电极的至少一部分与电绝缘层分离。

    Ferroelectric memory using multiferroics
    2.
    发明授权
    Ferroelectric memory using multiferroics 失效
    铁电记忆使用多铁性

    公开(公告)号:US07700985B2

    公开(公告)日:2010-04-20

    申请号:US12144697

    申请日:2008-06-24

    IPC分类号: H01L29/94 G11C16/06

    摘要: Ferroelectric memory using multiferroics is described. The multiferroic memory includes a substrate having a source region, a drain region and a channel region separating the source region and the drain region. An electrically insulating layer is adjacent to the source region, drain region and channel region. A data storage cell having a composite multiferroic layer is adjacent to the electrically insulating layer. The electrically insulating layer separated the data storage cell form the channel region. A control gate electrode is adjacent to the data storage cell. The data storage cell separates at least a portion of the control gate electrode from the electrically insulating layer.

    摘要翻译: 描述了使用多铁性的铁电存储器。 多铁性存储器包括具有源区域,漏极区域和分离源极区域和漏极区域的沟道区域的衬底。 电绝缘层与源极区,漏极区和沟道区相邻。 具有复合多铁层的数据存储单元与电绝缘层相邻。 电绝缘层从通道区域分离数据存储单元。 控制栅电极与数据存储单元相邻。 数据存储单元将控制栅电极的至少一部分与电绝缘层分离。

    Band engineered high-K tunnel oxides for non-volatile memory
    8.
    发明授权
    Band engineered high-K tunnel oxides for non-volatile memory 有权
    用于非易失性存储器的带式工程高K隧道氧化物

    公开(公告)号:US07875923B2

    公开(公告)日:2011-01-25

    申请号:US12120715

    申请日:2008-05-15

    IPC分类号: H01L29/788

    CPC分类号: H01L29/792

    摘要: A non-volatile memory cell that has a charge source region, a charge storage region, and a crested tunnel barrier layer that has a potential energy profile which peaks between the charge source region and the charge storage region. The tunnel barrier layer has multiple high-K dielectric materials, either as individual layers or as compositionally graded materials.

    摘要翻译: 具有电荷源区域,电荷存储区域和具有在电荷源区域和电荷存储区域之间峰值的势能分布的波峰隧道势垒层的非易失性存储单元。 隧道势垒层具有多个高K电介质材料,无论是单独层还是成分分级材料。

    BAND ENGINEERED HIGH-K TUNNEL OXIDES FOR NON-VOLATILE MEMORY
    9.
    发明申请
    BAND ENGINEERED HIGH-K TUNNEL OXIDES FOR NON-VOLATILE MEMORY 有权
    用于非易失性存储器的BAND工程高K隧道氧化物

    公开(公告)号:US20090283816A1

    公开(公告)日:2009-11-19

    申请号:US12120715

    申请日:2008-05-15

    IPC分类号: H01L29/788

    CPC分类号: H01L29/792

    摘要: A non-volatile memory cell that has a charge source region, a charge storage region, and a crested tunnel barrier layer that has a potential energy profile which peaks between the charge source region and the charge storage region. The tunnel barrier layer has multiple high-K dielectric materials, either as individual layers or as compositionally graded materials.

    摘要翻译: 具有电荷源区域,电荷存储区域和具有在电荷源区域和电荷存储区域之间峰值的势能分布的波峰隧道势垒层的非易失性存储单元。 隧道势垒层具有多个高K电介质材料,无论是单独层还是成分分级材料。