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    Grounding of silicon-on-insulator structure
    4.
    发明授权
    Grounding of silicon-on-insulator structure 有权
    绝缘体上硅结构的接地

    公开(公告)号：US09087906B2

    公开(公告)日：2015-07-21

    申请号：US14505483

    申请日：2014-10-02

    申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.

    发明人： Purakh Raj Verma ,  Shaoqiang Zhang ,  Bo Yu ,  Guan Huei See ,  Rui Tze Toh ,  Tao Jiang

    IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L21/02

    CPC分类号： H01L29/78657 ,  H01L21/02381 ,  H01L21/02422 ,  H01L21/743 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/66477

    摘要： Devices and methods for forming a device are presented. The method includes providing a substrate having at least a first region and a second region prepared with isolation regions. The first region is referred to as a chip guarding area and the second region defines a chip region of which at least one transistor is to be formed. The substrate includes a top surface layer, a support substrate and an insulator layer in between them. A transistor is formed in the second region and a substrate contact structure is formed in the first region. The substrate contact structure passes through at least the top surface layer, insulator layer and isolation region and contacts a doped region in the support substrate. The substrate contact structure is connected to at least one conductive line with a desired potential to prevent charging of the support substrate at system level.

    摘要翻译： 提出了用于形成装置的装置和方法。 该方法包括提供具有至少第一区域的基底和用隔离区域制备的第二区域。 第一区域被称为芯片保护区域，第二区域限定要形成至少一个晶体管的芯片区域。 衬底包括顶表面层，支撑衬底和它们之间的绝缘体层。 晶体管形成在第二区域中，并且在第一区域中形成衬底接触结构。 衬底接触结构至少穿过顶表面层，绝缘体层和隔离区并与支撑衬底中的掺杂区接触。 衬底接触结构连接到具有期望电位的至少一个导电线，以防止在系统级别对支撑衬底的充电。

    INTEGRATED CIRCUITS USING SILICON ON INSULATOR SUBSTRATES AND METHODS OF MANUFACTURING THE SAME
    6.
    发明申请
    INTEGRATED CIRCUITS USING SILICON ON INSULATOR SUBSTRATES AND METHODS OF MANUFACTURING THE SAME 有权
    绝缘子基板上使用硅的集成电路及其制造方法

    公开(公告)号：US20160276210A1

    公开(公告)日：2016-09-22

    申请号：US14662427

    申请日：2015-03-19

    申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.

    发明人： Rui Tze Toh ,  Guan Huei See ,  Shaoqiang Zhang ,  Raj Verma Purakh

    IPC分类号： H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L21/28

    CPC分类号： H01L21/76283 ,  H01L21/76205 ,  H01L21/76229 ,  H01L21/84 ,  H01L21/845 ,  H01L27/1203 ,  H01L27/1211

    摘要： Integrated circuits and methods for manufacturing the same are provided. A method for producing an integrated circuit includes forming a deep isolation block in an SOI substrate, where the SOI substrate includes a substrate layer overlying a buried insulator that in turn overlies a carrier wafer. The deep isolation block extends through the substrate layer and contacts the buried insulator. A shallow isolation block is formed in the substrate layer, where the shallow isolation block overlies a portion of the substrate layer. An isolation mask is formed overlying at least a portion of the deep isolation block to form a masked isolation block and an exposed isolation block, where the exposed isolation block includes the shallow isolation block. The exposed isolation block is removed such that a trough is defined in the substrate layer where the shallow isolation block was removed, and a gate is formed within the trough.

    摘要翻译： 提供了集成电路及其制造方法。 一种集成电路的制造方法包括在SOI衬底中形成深度隔离块，其中SOI衬底包括覆盖在承载晶片上的掩埋绝缘体的衬底层。 深的隔离块延伸穿过衬底层并接触埋入的绝缘体。 在衬底层中形成浅的隔离块，其中浅隔离块覆盖衬底层的一部分。 形成隔离掩模，覆盖深隔离块的至少一部分以形成掩蔽的隔离块和暴露的隔离块，其中暴露的隔离块包括浅隔离块。 去除暴露的隔离块，使得在衬底层中限定了槽，其中浅隔离块被去除，并且在槽内形成栅极。

    Silicon-on-insulator integrated circuit devices with body contact structures
    7.
    发明授权
    Silicon-on-insulator integrated circuit devices with body contact structures 有权
    具有体接触结构的绝缘体上硅集成电路器件

    公开(公告)号：US09230990B2

    公开(公告)日：2016-01-05

    申请号：US14253629

    申请日：2014-04-15

    申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.

    发明人： Shaoqiang Zhang ,  Guan Huei See ,  Purakh Raj Verma

    IPC分类号： H01L27/01 ,  H01L27/12 ,  H01L29/00 ,  H01L21/768 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

    CPC分类号： H01L27/1203 ,  H01L21/76229 ,  H01L21/76283 ,  H01L21/76897 ,  H01L21/823475 ,  H01L27/0207 ,  H01L29/1087 ,  H01L29/66575 ,  H01L29/7824 ,  H01L29/78615

    摘要： Silicon-on-insulator integrated circuits including body contact structures and methods for fabricating the same are disclosed. A method for fabricating a silicon-on-insulator integrated circuit includes filling a plurality of first and second shallow isolation trenches with an insulating material to form plurality of first and second shallow trench isolation (STI) structures, and forming a gate structure over the semiconductor layer that includes a first portion disposed over and parallel to at least two of the plurality of second STI structures and a second portion disposed in between the at least two of the plurality of second STI structures. The method further includes forming contact plugs to a body contact region of the semiconductor layer. The body contact region comprises a portion of the semiconductor layer between at least one of the plurality of first STI structures and at least one of the plurality of second STI structures.

    摘要翻译： 公开了包括体接触结构的绝缘体上硅集成电路及其制造方法。 一种用于制造绝缘体上硅集成电路的方法包括用绝缘材料填充多个第一和第二浅隔离沟槽以形成多个第一和第二浅沟槽隔离（STI）结构，以及在半导体上形成栅极结构 层，其包括布置在所述多个第二STI结构中的至少两个上方并且平行于所述多个第二STI结构中的至少两个的第一部分和设置在所述多个第二STI结构中的所述至少两个之间的第二部分。 该方法还包括将接触塞形成到半导体层的体接触区域。 身体接触区域包括多个第一STI结构中的至少一个与多个第二STI结构中的至少一个之间的半导体层的一部分。