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公开(公告)号：US20120153386A1
公开(公告)日：2012-06-21
申请号：US13330205
申请日：2011-12-19
IPC分类号： H01L27/088
CPC分类号： H01L29/7397 , H01L29/0615 , H01L29/0623 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/0878 , H01L29/1045 , H01L29/105 , H01L29/1095 , H01L29/404 , H01L29/407 , H01L29/42376 , H01L29/66674 , H01L29/66734 , H01L29/7801 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/861 , H01L29/872
摘要： A semiconductor component is disclosed. One embodiment includes a semiconductor body including a first semiconductor layer having at least one active component zone, a cell array with a plurality of trenches, and at least one cell array edge zone. The cell array edge zone is only arranged in an edge region of the cell array, adjoining at least one trench of the cell array, and being at least partially arranged below the at least one trench in the cell array.
摘要翻译： 公开了半导体部件。 一个实施例包括半导体本体，其包括具有至少一个有源分量区的第一半导体层，具有多个沟槽的单元阵列和至少一个单元阵列边缘区。 单元阵列边缘区域仅布置在单元阵列的边缘区域中，邻接单元阵列的至少一个沟槽，并且至少部分地布置在单元阵列中的至少一个沟槽的下方。
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公开(公告)号：US08080858B2
公开(公告)日：2011-12-20
申请号：US11833328
申请日：2007-08-03
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/0623 , H01L29/0653 , H01L29/0661 , H01L29/404 , H01L29/407 , H01L29/42376 , H01L29/66734 , H01L29/7397 , H01L29/7813 , H01L29/861 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A Semiconductor component having a space saving edge structure is disclosed. One embodiment provides a first side, a second side, an inner region, an edge region adjoining the inner region in a lateral direction of the semiconductor body, and a first semiconductor layer extending across the inner region and the edge region and having a basic doping of a first conductivity type. At least one active component zone of a second conductivity type, which is complementary to the first conductivity type, is disposed in the inner region in the first semiconductor layer. An edge structure is disposed in the edge region and includes at least one trench extending from the first side into the semiconductor body. An edge electrode is disposed in the trench, a dielectric layer is disposed in the trench between the edge electrode and the semiconductor body, a first edge zone of the second conductivity type adjoin the trench and are at least partially disposed below the trench.
摘要翻译： 公开了具有节省空间的边缘结构的半导体部件。 一个实施例提供了第一侧面，第二侧面，内部区域，与半导体主体的横向方向上的内部区域相邻的边缘区域以及跨越内部区域和边缘区域延伸并具有基本掺杂的第一半导体层 的第一导电类型。 与第一导电类型互补的至少一个第二导电类型的活性组分区域设置在第一半导体层的内部区域中。 边缘结构设置在边缘区域中并且包括从第一侧延伸到半导体本体中的至少一个沟槽。 边缘电极设置在沟槽中，电介质层设置在边缘电极和半导体本体之间的沟槽中，第二导电类型的第一边缘区域与沟槽相邻并且至少部分地设置在沟槽下方。
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公开(公告)号：US09252251B2
公开(公告)日：2016-02-02
申请号：US13330205
申请日：2011-12-19
IPC分类号： H01L29/739 , H01L29/66 , H01L29/78 , H01L29/861 , H01L29/872 , H01L29/06 , H01L29/40 , H01L29/423
CPC分类号： H01L29/7397 , H01L29/0615 , H01L29/0623 , H01L29/0653 , H01L29/0661 , H01L29/0696 , H01L29/0878 , H01L29/1045 , H01L29/105 , H01L29/1095 , H01L29/404 , H01L29/407 , H01L29/42376 , H01L29/66674 , H01L29/66734 , H01L29/7801 , H01L29/7802 , H01L29/7811 , H01L29/7813 , H01L29/861 , H01L29/872
摘要： A semiconductor component is disclosed. One embodiment includes a semiconductor body including a first semiconductor layer having at least one active component zone, a cell array with a plurality of trenches, and at least one cell array edge zone. The cell array edge zone is only arranged in an edge region of the cell array, adjoining at least one trench of the cell array, and being at least partially arranged below the at least one trench in the cell array.
摘要翻译： 公开了半导体部件。 一个实施例包括半导体本体，其包括具有至少一个有源分量区的第一半导体层，具有多个沟槽的单元阵列和至少一个单元阵列边缘区。 单元阵列边缘区域仅布置在单元阵列的边缘区域中，邻接单元阵列的至少一个沟槽，并且至少部分地布置在单元阵列中的至少一个沟槽的下方。
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公开(公告)号：US20080042172A1
公开(公告)日：2008-02-21
申请号：US11833328
申请日：2007-08-03
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/0623 , H01L29/0653 , H01L29/0661 , H01L29/404 , H01L29/407 , H01L29/42376 , H01L29/66734 , H01L29/7397 , H01L29/7813 , H01L29/861 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A Semiconductor component having a space saving edge structure is disclosed. One embodiment provides a first side, a second side, an inner region, an edge region adjoining the inner region in a lateral direction of the semiconductor body, and a first semiconductor layer extending across the inner region and the edge region and having a basic doping of a first conductivity type. At least one active component zone of a second conductivity type, which is complementary to the first conductivity type, is disposed in the inner region in the first semiconductor layer. An edge structure is disposed in the edge region and includes at least one trench extending from the first side into the semiconductor body. An edge electrode is disposed in the trench, a dielectric layer is disposed in the trench between the edge electrode and the semiconductor body, a first edge zone of the second conductivity type adjoin the trench and are at least partially disposed below the trench.
摘要翻译： 公开了具有节省空间的边缘结构的半导体部件。 一个实施例提供了第一侧面，第二侧面，内部区域，与半导体主体的横向方向上的内部区域相邻的边缘区域以及跨越内部区域和边缘区域延伸并具有基本掺杂的第一半导体层 的第一导电类型。 与第一导电类型互补的至少一个第二导电类型的活性组分区域设置在第一半导体层的内部区域中。 边缘结构设置在边缘区域中并且包括从第一侧延伸到半导体本体中的至少一个沟槽。 边缘电极设置在沟槽中，电介质层设置在边缘电极和半导体本体之间的沟槽中，第二导电类型的第一边缘区域与沟槽相邻并且至少部分地设置在沟槽下方。
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公开(公告)号：US08884360B2
公开(公告)日：2014-11-11
申请号：US13404161
申请日：2012-02-24
申请人： Ralf Siemieniec , Oliver Blank , Anton Mauder , Franz Hirler
发明人： Ralf Siemieniec , Oliver Blank , Anton Mauder , Franz Hirler
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/0619 , H01L29/0623 , H01L29/0696 , H01L29/1095 , H01L29/407 , H01L29/41741 , H01L29/41766 , H01L29/66727 , H01L29/66734 , H01L29/7811
摘要： A semiconductor device includes a first contact in low Ohmic contact with a source region of the device and a first portion of a body region of the device formed in an active area of the device, and a second contact in low Ohmic contact with a second portion of the body region formed in a peripheral area of the device. The minimum width of the second contact at a first surface of the device is larger than the minimum width of the first contact at the first surface so that maximum current density during commutating the semiconductor device is reduced and thus the risk of device damage during hard commutating is also reduced.
摘要翻译： 半导体器件包括与器件的源极区域的低欧姆接触的第一接触和形成在器件的有源区域中的器件的体区的第一部分，以及与第二部分的低欧姆接触的第二接触 形成在装置的周边区域中的身体区域。 器件第一表面处的第二触点的最小宽度大于第一表面处的第一接触的最小宽度，使得在半导体器件的整流期间的最大电流密度降低，并且因此在硬整流期间器件损坏的风险 也减少了。
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6.发明申请Stress-Reduced Field-Effect Semiconductor Device and Method for Forming Therefor 有权应力减小场效应半导体器件及其形成方法公开(公告)号：US20130248993A1
公开(公告)日：2013-09-26
申请号：US13429525
申请日：2012-03-26
申请人： Stefan Sedlmaier , Markus Zundel , Franz Hirler , Johannes Baumgartl , Anton Mauder , Ralf Siemieniec , Oliver Blank , Michael Hutzler
发明人： Stefan Sedlmaier , Markus Zundel , Franz Hirler , Johannes Baumgartl , Anton Mauder , Ralf Siemieniec , Oliver Blank , Michael Hutzler
IPC分类号： H01L27/088 , H01L21/283 , H01L29/78
CPC分类号： H01L29/407 , H01L21/765 , H01L29/0653 , H01L29/401 , H01L29/41766 , H01L29/42368 , H01L29/515 , H01L29/66734 , H01L29/7397 , H01L29/7804 , H01L29/7811 , H01L29/7813 , H01L29/7843
摘要： A field-effect semiconductor device is provided. The field-effect semiconductor device includes a semiconductor body with a first surface defining a vertical direction. In a vertical cross-section the field-effect semiconductor device further includes a vertical trench extending from the first surface into the semiconductor body. The vertical trench includes a field electrode, a cavity at least partly surrounded by the field electrode, and an insulation structure substantially surrounding at least the field electrode. Further, a method for producing a field-effect semiconductor device is provided.
摘要翻译： 提供场效应半导体器件。 场效应半导体器件包括具有限定垂直方向的第一表面的半导体本体。 在垂直截面中，场效应半导体器件还包括从第一表面延伸到半导体本体中的垂直沟槽。 垂直沟槽包括场电极，至少部分地被场电极包围的空腔以及至少基本上围绕场电极的绝缘结构。 此外，提供了一种用于制造场效应半导体器件的方法。
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公开(公告)号：US20130221427A1
公开(公告)日：2013-08-29
申请号：US13404161
申请日：2012-02-24
申请人： Ralf Siemieniec , Oliver Blank , Anton Mauder , Franz Hirler
发明人： Ralf Siemieniec , Oliver Blank , Anton Mauder , Franz Hirler
CPC分类号： H01L29/7813 , H01L29/0619 , H01L29/0623 , H01L29/0696 , H01L29/1095 , H01L29/407 , H01L29/41741 , H01L29/41766 , H01L29/66727 , H01L29/66734 , H01L29/7811
摘要： A semiconductor device includes a first contact in low Ohmic contact with a source region of the device and a first portion of a body region of the device formed in an active area of the device, and a second contact in low Ohmic contact with a second portion of the body region formed in a peripheral area of the device. The minimum width of the second contact at a first surface of the device is larger than the minimum width of the first contact at the first surface so that maximum current density during commutating the semiconductor device is reduced and thus the risk of device damage during hard commutating is also reduced.
摘要翻译： 半导体器件包括与器件的源极区域的低欧姆接触的第一接触和形成在器件的有源区域中的器件的体区的第一部分，以及与第二部分的低欧姆接触的第二接触 形成在装置的周边区域中的身体区域。 器件第一表面处的第二触点的最小宽度大于第一表面处的第一接触的最小宽度，使得在半导体器件的整流期间的最大电流密度降低，并且因此在硬整流期间器件损坏的风险 也减少了。
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公开(公告)号：US08502315B2
公开(公告)日：2013-08-06
申请号：US13463243
申请日：2012-05-03
IPC分类号： H01L29/78
CPC分类号： H01L29/66719 , H01L29/0878 , H01L29/407 , H01L29/408 , H01L29/42368 , H01L29/513 , H01L29/66734 , H01L29/7813
摘要： A semiconductor device includes a source, a drain, and a gate configured to selectively enable a current to pass between the source and the drain. The semiconductor device includes a drift zone between the source and the drain and a first field plate adjacent the drift zone. The semiconductor device includes a dielectric layer electrically isolating the first field plate from the drift zone and charges within the dielectric layer close to an interface of the dielectric layer adjacent the drift zone.
摘要翻译： 半导体器件包括源极，漏极和被配置为选择性地使电流在源极和漏极之间通过的栅极。 半导体器件包括源极和漏极之间的漂移区和邻近漂移区的第一场板。 半导体器件包括将第一场板与漂移区电隔离的电介质层，并且电介质层内的电荷接近靠近漂移区的电介质层的界面。
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公开(公告)号：US07582531B2
公开(公告)日：2009-09-01
申请号：US11364882
申请日：2006-02-28
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L21/263 , H01L21/761 , H01L27/0623 , H01L27/088 , H01L27/0922 , H01L29/0878 , H01L29/407 , H01L29/41741 , H01L29/66734
摘要： A method for producing a region of increased doping in an n-doped semiconductor layer which is buried in a semiconductor body of a vertical power transistor and which is arranged between a p-doped body region facing the front side contact of the power transistor and an n-doped substrate facing the rear side contact of the power transistor has the following steps: a) irradiation of at least one part of the surface of the semiconductor body with protons, and b) heat treatment of the semiconductor body.
摘要翻译： 一种在n掺杂半导体层中产生增加的掺杂区域的方法，该n掺杂半导体层被埋在垂直功率晶体管的半导体本体中并且被布置在面向功率晶体管的前侧接触的p掺杂体区域和 面向功率晶体管的后侧接触的n掺杂衬底具有以下步骤：a）用质子照射半导体主体的至少一部分表面，以及b）半导体本体的热处理。
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10.发明申请INTEGRATRED CIRCUIT INCLUDING A TRENCH TRANSISTOR HAVING TWO CONTROL ELECTRODES 有权集成电路，包括具有两个控制电极的激光晶体管公开(公告)号：US20070296029A1
公开(公告)日：2007-12-27
申请号：US11760275
申请日：2007-06-08
申请人： Franz Hirler , Maximilian Roesch , Ralf Siemieniec
发明人： Franz Hirler , Maximilian Roesch , Ralf Siemieniec
IPC分类号： H01L31/00
CPC分类号： H01L29/7811 , H01L29/407 , H01L29/41741 , H01L29/41766 , H01L29/4238 , H01L29/7813
摘要： An integrated circuit including a field effect controllable trench transistor having two-control electrodes is disclosed. One embodiment provides a trench having a first control electrode and a second control electrode. A first electrical line is provided in an edge structure for electrically contact-connecting second control electrode.
摘要翻译： 公开了一种包括具有双控电极的场效应可控沟槽晶体管的集成电路。 一个实施例提供了具有第一控制电极和第二控制电极的沟槽。 第一电线设置在用于电接触连接第二控制电极的边缘结构中。
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