公开(公告)号：US07251299B2

公开(公告)日：2007-07-31

申请号：US10444266

申请日：2003-05-23

申请人： Fabian Lis ,  Joshua Kablotsky ,  Haim Primo

发明人： Fabian Lis ,  Joshua Kablotsky ,  Haim Primo

IPC分类号： H04D1/00 ,  H04L27/06

CPC分类号： H04L25/0214 ,  H04B3/23

摘要： A system for time delay estimation in a discrete time processing system includes a cross correlator that performs cross correlation on a first signal and a second signal, and provides a cross correlated output signals indicative thereof. A lag smoother receives the cross correlated output signals, and provides lag smoothed output signals indicative thereof. A select logic module selects a pre-defined number of signal values from a respective set indicative of the lag smoothed output signals to compute the time delay estimation associated with the first and second signals.

摘要翻译： 在离散时间处理系统中用于时间延迟估计的系统包括在第一信号和第二信号上执行互相关的交叉相关器，并提供指示其的交叉相关输出信号。 滞后平滑器接收交叉相关输出信号，并提供指示其的滞后平滑输出信号。 选择逻辑模块从指示滞后平滑输出信号的相应集合中选择预定数量的信号值，以计算与第一和第二信号相关联的时延估计。

公开(公告)号：US20110103453A1

公开(公告)日：2011-05-05

申请号：US13004326

申请日：2011-01-11

申请人： Haim Primo ,  Yosef Stein ,  Wei An

发明人： Haim Primo ,  Yosef Stein ,  Wei An

IPC分类号： H04L27/01 ,  H04L27/28

CPC分类号： H04L25/03038 ,  H04B17/345 ,  H04B17/364 ,  H04L25/0218 ,  H04L25/0228 ,  H04L25/025 ,  H04L25/03159 ,  H04L27/2647 ,  H04L2025/03414 ,  H04L2025/03783

摘要： Channel estimation for high mobility OFDM channels is achieved by identifying a set of channel path delays from an OFDM symbol stream including carrier data, inter-channel interference noise and channel noise; determining the average channel impulse response for the identified set of channel path delays in each symbol; generating a path delay curvature for each channel path delay in each symbol based on stored average channel impulse responses for the identified channel path delays; estimating the carrier data in the symbols in the OFDM symbol stream in the presence of inter-channel interference noise and channel noise from the OFDM symbol steam and the average impulse responses for the identified channel path delays; reconstructing the inter-channel interference noise in response to the path delay curvature, the identified set of channel path delays and estimated carrier data to produce a symbol stream of carrier data and channel noise with suppressed inter-channel interference noise.

摘要翻译： 通过从包括载波数据，信道间干扰噪声和信道噪声的OFDM符号流识别一组信道路径延迟来实现高移动性OFDM信道的信道估计; 确定每个符号中所识别的信道路径延迟集合的平均信道脉冲响应; 基于所识别的信道路径延迟的所存储的平均信道脉冲响应，为每个符号中的每个信道路径延迟生成路径延迟曲率; 在存在来自OFDM符号蒸汽的信道间干扰噪声和信道噪声以及所识别的信道路径延迟的平均脉冲响应的情况下，估计OFDM符号流中的符号中的载波数据; 响应于路径延迟曲率重建信道间干扰噪声，识别出的信道路径延迟集合和估计的载波数据，以产生具有抑制的信道间干扰噪声的载波数据和信道噪声的符号流。

公开(公告)号：US20100070819A1

公开(公告)日：2010-03-18

申请号：US12283863

申请日：2008-09-16

申请人： Yosef Stein ,  Hazarathaiah Malepati ,  Haim Primo

发明人： Yosef Stein ,  Hazarathaiah Malepati ,  Haim Primo

IPC分类号： H03M13/05 ,  G06F11/10

CPC分类号： H03M13/2957 ,  H03M13/2975 ,  H03M13/3905 ,  H03M13/3927 ,  H03M13/3994 ,  H04L1/005 ,  H04L1/0055 ,  H04L1/0071

摘要： A channel adaptive iterative turbo decoder for computing with MAP decoders a set of branch metrics for a window of received data, computing the forward and reverse recursive path state metrics and computing from the forward and reverse recursive path state metrics the log likelihood ratio for 1 and 0 and interleaving the decision bits; and identifying those MAP decoder decision bits which are non-convergent, computing a set of branch metrics for the received data, computing from the forward and reverse recursive path state metrics the log likelihood ratio (LLR) for 1 and 0 for each non-converged decision bit and interleaving the non-convergent decision bits.

摘要翻译： 一种信道自适应迭代turbo解码器，用于使用MAP解码器计算接收数据窗口的一组分支度量，计算正向和反向递归路径状态度量，以及从正向和反向递归路径状态度量计算1和对数似然比 0并交错判决位; 并且识别那些不收敛的MAP解码器判定比特，计算接收数据的一组分支度量，从正向和反向递归路径状态度量，计算每个非收敛的对数似然比（LLR）1和0 判决位和交织非收敛判定位。

公开(公告)号：US07283628B2

公开(公告)日：2007-10-16

申请号：US10170267

申请日：2002-06-12

申请人： Yosef Stein ,  Haim Primo

发明人： Yosef Stein ,  Haim Primo

IPC分类号： H04L9/06 ,  H04L9/18

CPC分类号： H04L9/0625 ,  H04L2209/12

摘要： A programmable data encryption engine for performing the cipher function of the data encryption standard (DES) algorithm includes a Galois field linear transformer system (GFLT) responsive to a first input data block to execute an E permutation to obtain an expanded data block and combine it with a key to obtain a second larger intermediate data block in one cycle; and further includes a parallel look-up table system for implementing the unique data encryption standard selection function(s) and for condensing the second larger intermediate data block to a third data block similar to the first input data block in a second cycle and submitting it to the Galois field linear transformer system to execute a second permutation in a third cycle resulting in a data encryption standard cipher function of the first input data block.

摘要翻译： 用于执行数据加密标准（DES）算法的密码函数的可编程数据加密引擎包括响应于第一输入数据块的伽罗瓦域线性变换器系统（GFLT），以执行E置换以获得扩展数据块并将其组合 具有在一个周期中获得第二较大中间数据块的密钥; 并且还包括用于实现唯一数据加密标准选择功能的并行查找表系统，并且用于在第二周期中将第二较大中间数据块与第一输入数据块类似的第三数据块进行聚合并将其提交 到Galois场线性变压器系统，以在第三周期中执行第二置换，得到第一输入数据块的数据加密标准密码函数。

公开(公告)号：US07082452B2

公开(公告)日：2006-07-25

申请号：US10228526

申请日：2002-08-26

申请人： Yosi Stein ,  Haim Primo ,  Yaniv Sapir

发明人： Yosi Stein ,  Haim Primo ,  Yaniv Sapir

IPC分类号： G06F7/00

CPC分类号： G06F7/724

摘要： A Galois field multiply/multiply-add/multiply-accumulate system includes a multiplier circuit for multiplying two polynomials with coefficients over a Galois field to obtain their product; a Galois field linear transformer circuit responsive to the multiplier circuit for predicting the modulo remainder of the polynomial product for an irreducible polynomial; a storage circuit for supplying to the Galois field linear transformer circuit a set of coefficient for predicting the modulo remainder for a predetermined irreducible polynomial; and a Galois field adder circuit for adding the product of the multiplier circuit with a third polynomial with coefficients over a Galois field for performing the multiplication and add operations in a single cycle.

摘要翻译： 伽罗瓦域乘法/乘法/乘法 - 累加系统包括乘法器电路，用于将两个多项式与伽罗瓦域上的系数相乘以获得其乘积; 响应于乘法器电路的用于预测用于不可约多项式的多项式积的模余数的伽罗瓦域线性变换器电路; 存储电路，用于向伽罗瓦斯线性变压器电路提供用于预测预定的不可约多项式的模余数的一组系数; 以及伽罗瓦域加法器电路，用于将乘法器电路的乘积与Galois域上的系数相加，以便在单个周期内执行乘法和加法运算。

公开(公告)号：US06738794B2

公开(公告)日：2004-05-18

申请号：US09829681

申请日：2001-04-10

申请人： Yosef Stein ,  Haim Primo

发明人： Yosef Stein ,  Haim Primo

IPC分类号： G06F1715

CPC分类号： G06F17/15 ,  G06F7/02 ,  G06F2207/025

摘要： A parallel bit correlator for recognizing a predetermined bit pattern including a predefined number m of bits in a stream of data bits including identifying successive sets of m bits in a stream of data bits and simultaneously comparing each of the sets of m bits to the predetermined bit pattern for detecting the presence of the predetermined bit pattern in the stream of data.

摘要翻译： 一种并行比特相关器，用于识别包括在数据比特流中包括预定数量m比特的预定比特模式，包括识别数据比特流中的m比特的连续组，同时将m比特中的每一个与预定比特 用于检测数据流中预定位模式的存在的模式。

公开(公告)号：US06587864B2

公开(公告)日：2003-07-01

申请号：US10051533

申请日：2002-01-18

申请人： Yosef Stein ,  Haim Primo ,  Joshua A. Kablotsky

发明人： Yosef Stein ,  Haim Primo ,  Joshua A. Kablotsky

IPC分类号： G06F700

CPC分类号： G06F7/724

摘要： A Galois field linear transformer includes a matrix responsive to a number of input bits in one or more bit streams and having a plurality of outputs providing the Galois field linear transformation of those bits; the matrix includes a plurality of cells, each cell including an exclusive OR logic circuit and AND logic circuit having an output connected to the exclusive OR logic circuit and an input connected to one of the input bits and a programmable storage device for providing an input to its associated AND logic circuit for setting the matrix to obtain a multi-cycle Galois field linear transformation of the inputs in a single cycle.

摘要翻译： 伽罗瓦域线性变换器包括响应于一个或多个比特流中的多个输入比特的矩阵并且具有提供这些比特的伽罗瓦域线性变换的多个输出的矩阵; 矩阵包括多个单元，每个单元包括异或逻辑电路和与逻辑电路，该逻辑电路具有连接到异或逻辑电路的输出和连接到输入位之一的输入端和可编程存储器件，用于提供输入 其相关联的AND逻辑电路用于设置矩阵以在单个周期中获得输入的多周期伽罗瓦域线性变换。

公开(公告)号：US09183079B2

公开(公告)日：2015-11-10

申请号：US14058048

申请日：2013-10-18

申请人： Yosef Stein ,  Haim Primo

发明人： Yosef Stein ,  Haim Primo

IPC分类号： H04L1/00 ,  G06F11/10

CPC分类号： G06F11/10 ,  H03M13/09 ,  H03M13/1102 ,  H03M13/29 ,  H03M13/2957 ,  H03M13/35 ,  H03M13/353 ,  H04L1/0041 ,  H04L1/0045 ,  H04L1/0063

摘要： A transmission system may include a transformer, an adder, an encoder, and a transmitter. The transformer may segment and transform a data packet into segments. The adder may add a check code to each of the segments. The encoder may encode error correction to each of the segments with the added check code. A receiving system may include a receiver, a decoder, a checker, and a selector decoder. The decoder may decode error correction in each of the encoded segments. The checker may check the check code of the error corrected segments. The selector decoder may select at least one of the valid segments based upon the check code and transform the selected segments into a data packet.

摘要翻译： 传输系统可以包括变压器，加法器，编码器和发射器。 变压器可以将数据包分段并转换成段。 加法器可以向每个段添加校验码。 编码器可以用添加的校验码对每个段进行纠错。 接收系统可以包括接收机，解码器，检验器和选择器解码器。 解码器可以解码每个编码段中的纠错。 检查员可以检查纠错段的检查码。 选择器解码器可以基于校验码来选择至少一个有效段，并将选择的段变换为数据分组。

公开(公告)号：US20110103450A1

公开(公告)日：2011-05-05

申请号：US13004305

申请日：2011-01-11

申请人： Haim Primo ,  Yosef Stein ,  Wei An

发明人： Haim Primo ,  Yosef Stein ,  Wei An

IPC分类号： H04B17/00

CPC分类号： H04L25/03038 ,  H04B17/345 ,  H04B17/364 ,  H04L25/0218 ,  H04L25/0228 ,  H04L25/025 ,  H04L25/03159 ,  H04L27/2647 ,  H04L2025/03414 ,  H04L2025/03783

摘要： Channel estimation for high mobility OFDM channels is achieved by identifying a set of channel path delays from an OFDM symbol stream including carrier data, inter-channel interference noise and channel noise; determining the average channel impulse response for the identified set of channel path delays in each symbol; generating a path delay curvature for each channel path delay in each symbol based on stored average channel impulse responses for the identified channel path delays; estimating the carrier data in the symbols in the OFDM symbol stream in the presence of inter-channel interference noise and channel noise from the OFDM symbol steam and the average impulse responses for the identified channel path delays; reconstructing the inter-channel interference noise in response to the path delay curvature, the identified set of channel path delays and estimated carrier data to produce a symbol stream of carrier data and channel noise with suppressed inter-channel interference noise.

公开(公告)号：US07508937B2

公开(公告)日：2009-03-24

申请号：US10255971

申请日：2002-09-26

申请人： Yosef Stein ,  Haim Primo

发明人： Yosef Stein ,  Haim Primo

IPC分类号： H04K1/04

CPC分类号： H04L9/0631 ,  H04L2209/125

摘要： A programmable data encryption engine for performing the cipher function of an advanced encryption standard (AES) algorithm includes a parallel look-up table system responsive in a first mode to a first data block for implementing an AES selection function and executing the multiplicative inverse in GF−1(28) and applying an affine over GF(2) transformation to obtain a subbyte transformation and in a second mode to the subbyte transformation to transform the subbyte transformation to obtain a shift row transformation, and a Galois field multiplier for transforming the shift row transformation to obtain a mix column transformation and add a round key resulting in an advanced encryption standard cipher function of the first data block.

摘要翻译： 用于执行高级加密标准（AES）算法的加密功能的可编程数据加密引擎包括：以第一模式响应于第一数据块的并行查找表系统，用于实现AES选择功能并在GF中执行乘法逆 -1（28），并且在GF（2）变换上应用仿射以获得子字节变换，并且在第二模式中对子字节变换进行变换以变换子字节变换以获得移位行变换;以及用于变换移位的伽罗瓦域乘法器 行转换以获得混合列转换并添加一个循环密钥，产生第一数据块的高级加密标准密码函数。