-
公开(公告)号：US06507215B1
公开(公告)日：2003-01-14
申请号：US09837918
申请日：2001-04-18
Applicant: Douglas S. Piasecki , Alvin C. Storvik, II
Inventor： Douglas S. Piasecki , Alvin C. Storvik, II
IPC: G06F738
CPC classification number: G06F13/4072
Abstract: A pin interface for an integrated circuit. The pin interface includes logic gates for processing digital signals, and analog lines for carrying analog signals. The pin interface includes circuits for disabling the digital circuits when configured to carry analog signals.
Abstract translation: 集成电路的引脚接口。 引脚接口包括用于处理数字信号的逻辑门和用于承载模拟信号的模拟线。 引脚接口包括用于在配置为承载模拟信号时禁用数字电路的电路。
-
公开(公告)号：US06509758B2
公开(公告)日：2003-01-21
申请号：US09837921
申请日：2001-04-18
Applicant: Douglas S. Piasecki , Alvin C. Storvik, II
Inventor： Douglas S. Piasecki , Alvin C. Storvik, II
IPC: H03K19177
CPC classification number: G06J1/00
Abstract: An integrated circuit providing mixed signal processing. I/O pin interface circuits include logic gates and other circuits for processing digital and analog signals. Processor-controlled configuration circuits allow the various I/O pin interface circuits to process either analog or digital circuits. The I/O pins can be configured for digital or analog operation on the fly.
Abstract translation: 提供混合信号处理的集成电路。 I / O引脚接口电路包括用于处理数字和模拟信号的逻辑门和其他电路。 处理器控制的配置电路允许各种I / O引脚接口电路处理模拟或数字电路。 I / O引脚可以配置为数字或模拟操作。
-
公开(公告)号：US07046035B2
公开(公告)日：2006-05-16
申请号：US11114840
申请日：2005-04-26
Applicant: Douglas S. Piasecki , Alvin C. Storvik, II
Inventor： Douglas S. Piasecki , Alvin C. Storvik, II
IPC: H03K19/173
CPC classification number: G06F13/4072
Abstract: A pin interface for an integrated circuit. The pin interface includes logic gates for processing digital signals, and analog lines for carrying analog signals. The pin interface includes circuits for disabling the digital circuits when configured to carry analog signals. A comparator is associated with at least one of the pins for comparing the analog voltage level thereon with a reference voltage.
Abstract translation: 集成电路的引脚接口。 引脚接口包括用于处理数字信号的逻辑门和用于承载模拟信号的模拟线。 引脚接口包括用于在配置为承载模拟信号时禁用数字电路的电路。 比较器与至少一个引脚相关联，用于将其上的模拟电压电平与参考电压进行比较。
-
公开(公告)号：US06900660B2
公开(公告)日：2005-05-31
申请号：US10347709
申请日：2003-01-21
Applicant: Douglas S. Piasecki , Alvin C. Storvik, II
Inventor： Douglas S. Piasecki , Alvin C. Storvik, II
IPC: G06J1/00 , H03K19/177
CPC classification number: G06J1/00
Abstract: An integrated circuit providing mixed signal processing. I/O pin interface circuits include logic gates and other circuits for processing digital and analog signals. Processor-controlled configuration circuits allow the various I/O pin interface circuits to process either analog or digital circuits. The I/O pins can be configured for digital or analog operation on the fly.
Abstract translation: 提供混合信号处理的集成电路。 I / O引脚接口电路包括用于处理数字和模拟信号的逻辑门和其他电路。 处理器控制的配置电路允许各种I / O引脚接口电路处理模拟或数字电路。 I / O引脚可以配置为数字或模拟操作。
-
公开(公告)号：US06885219B2
公开(公告)日：2005-04-26
申请号：US10341396
申请日：2003-01-13
Applicant: Douglas S. Piasecki , Alvin C. Storvik II
Inventor： Douglas S. Piasecki , Alvin C. Storvik II
IPC: G01R31/28 , G06F7/38 , G06F13/40 , H03K19/173
CPC classification number: G06F13/4072
Abstract: A pin interface for an integrated circuit. The pin interface includes logic gates for processing digital signals, and analog lines for carrying analog signals. The pin interface includes circuits for disabling the digital circuits when configured to carry analog signals.
Abstract translation: 集成电路的引脚接口。 引脚接口包括用于处理数字信号的逻辑门和用于承载模拟信号的模拟线。 引脚接口包括用于在配置为承载模拟信号时禁用数字电路的电路。
-
Patent Agency Ranking
公开(公告)号：US07498962B2
公开(公告)日：2009-03-03
申请号：US11618644
申请日：2006-12-29
Applicant: Donald E. Alfano , Danny J. Allred , Douglas S. Piasecki , Kenneth W. Fernald , Ka Y. Leung , Brian Caloway , Alvin Storvik , Paul Highley , Douglas R. Holberg
Inventor： Donald E. Alfano , Danny J. Allred , Douglas S. Piasecki , Kenneth W. Fernald , Ka Y. Leung , Brian Caloway , Alvin Storvik , Paul Highley , Douglas R. Holberg
IPC: H03M1/00
CPC classification number: G06F13/385 , G06F1/08 , G06F15/7814 , H03M1/122 , H03M1/183 , H03M1/462 , Y02D10/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
Abstract: A method for converting analog data to digital data includes operating an analog-to-digital data converter in a tracking mode to sample an input signal and in a convert mode to convert the sampled input signal after sampling to a digital signal. The analog-to-digital data converter is controlled with a controller to operate in different modes of operation by providing at least one step wherein the tracking mode of operation is controlled to initiate at a predetermined time to begin the sampling operation.
Abstract translation: 一种将模拟数据转换为数字数据的方法包括以跟踪模式操作模拟数字数据转换器，以对输入信号进行采样，并以转换模式将采样后的采样输入信号转换为数字信号。 模拟数字数据转换器由控制器控制，以通过提供至少一个步骤操作在不同的操作模式，其中跟踪操作模式被控制以在预定时间开始以开始采样操作。
-
7.发明授权公开(公告)号：US07411538B1
公开(公告)日：2008-08-12
申请号：US11695002
申请日：2007-03-31
Applicant: Douglas S. Piasecki
Inventor： Douglas S. Piasecki
IPC: H03M1/38
Abstract: A circuit includes a successive approximation register A/D converter for performing analog to digital conversions. The register has a ground pin and a ground sense pin. The ground sense pin is connected to a ground port of the circuit. A multiplexer connects the ground sense pin of the successive approximation register A/D converter to one of a plurality of I/O ports of the circuit package. A switch selectively connects the ground sense pin of the successive approximation register A/D converter to the ground port.
Abstract translation: 电路包括用于执行模数转换的逐次逼近寄存器A / D转换器。 寄存器具有接地引脚和接地检测引脚。 接地感测引脚连接到电路的接地端口。 多路复用器将逐次逼近寄存器A / D转换器的接地检测引脚连接到电路封装的多个I / O端口之一。 开关选择性地将逐次逼近寄存器A / D转换器的接地检测引脚连接到接地端口。
-
8.发明授权High precision SAR converter using resistor strip with auto zeroing function 有权高精度SAR转换器采用带自动调零功能的电阻条公开(公告)号：US06529152B1
公开(公告)日：2003-03-04
申请号：US09901845
申请日：2001-07-09
Applicant: Douglas S. Piasecki , Ka Y. Leung
Inventor： Douglas S. Piasecki , Ka Y. Leung
IPC: H03N166
Abstract: A digital-to-analog converter having a semiconductor resistor strip with plural voltage taps. One voltage tap formed of the semiconductor material defines a nonzero reference voltage for the converter. An auto-zeroing amplifier is utilized to charge a coupling capacitor to the nonzero reference voltage. In the conversion process, the analog voltages at the other voltage taps of the resistor strip are selected via a switch arrangement and coupled to the coupling capacitor. The linearity of the digital-to-analog converter is thus more independent of parasitic resistances that may be formed in the ground connection to the resistor string.
Abstract translation: 具有具有多个电压抽头的半导体电阻条的数 - 模转换器。 由半导体材料形成的一个电压抽头为转换器定义非零参考电压。 利用自动归零放大器将耦合电容器充电到非零参考电压。 在转换过程中，电阻条的其他电压抽头上的模拟电压经由开关装置选择并耦合到耦合电容器。 因此，数 - 模转换器的线性度与在与电阻串的接地连接中可能形成的寄生电阻更独立。
-
9.发明授权Analog-to-digital converter for processing differential and single-ended inputs 有权用于处理差分和单端输入的模数转换器公开(公告)号：US06456220B1
公开(公告)日：2002-09-24
申请号：US09595959
申请日：2000-06-19
Applicant: Ka Y. Leung , Douglas S. Piasecki
Inventor： Ka Y. Leung , Douglas S. Piasecki
IPC: H03M112
Abstract: An analog-to-digital converter configurable for converting both differential and single-ended analog signals. Charge sharing between two input capacitors and a DAC capacitor allow the full dynamic range of the ADC device to be used when full scale differential analog input signals are converted. When configured for single-ended operation, charge sharing of the half scale single-ended input analog voltage occurs between one input capacitor and the DAC capacitor to allow the full dynamic range of the ADC device to again be utilized.
Abstract translation: 可配置用于转换差分和单端模拟信号的模数转换器。 两个输入电容和DAC电容之间的电荷共享允许在转换满量程差分模拟输入信号时使用ADC器件的全部动态范围。 当配置为单端操作时，半标准单端输入模拟电压的电荷共享发生在一个输入电容和DAC电容之间，以允许再次使用ADC器件的完整动态范围。
-
10.发明授权公开(公告)号：US06404375B1
公开(公告)日：2002-06-11
申请号：US09393091
申请日：1999-09-09
Applicant: Carlos Esteban Muñoz , Karl Ernesto Thompson , Douglas S. Piasecki , Wai Laing Lee , Eric Swanson
Inventor： Carlos Esteban Muñoz , Karl Ernesto Thompson , Douglas S. Piasecki , Wai Laing Lee , Eric Swanson
IPC: H03M112
CPC classification number: H03M1/1042 , H03M1/0692 , H03M1/109 , H03M1/46
Abstract: A digital calibration system for an analog-to-digital converter system includes a computational system receiving digital bits from an analog-to-digital converter representing selection of elements of the digital-to-analog converter in response to an analog input. The computational engine produces a digital output representative of the analog input during conversion operation, and digital values for adjustment of an adjustable analog source during calibration. Further, a digital system comprises a radix-less-than-two non-configurable digital-to-analog converter, a comparator system connected to the converter, and a computational system configured for SAR calibration and conversion.
Abstract translation: 用于模数转换器系统的数字校准系统包括计算系统，其接收来自模数转换器的数字位，其响应于模拟输入来表示选择数模转换器的元件。 计算引擎在转换操作期间产生代表模拟输入的数字输出，以及用于在校准期间调节可调模拟源的数字值。 此外，数字系统包括二进制以下的不可配置的数模转换器，连接到转换器的比较器系统以及被配置用于SAR校准和转换的计算系统。
-
-
-
-
-
-
-
-
-
Search Results
37
records
(took 0.025 seconds)
