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    Surface processes in fabrications of microstructures
    6.
    发明申请
    Surface processes in fabrications of microstructures 审中-公开
    微观结构的表面处理

    公开(公告)号：US20050106774A1

    公开(公告)日：2005-05-19

    申请号：US10713671

    申请日：2003-11-13

    Applicant: Dmitri Simonian ,  John Porter

    Inventor： Dmitri Simonian ,  John Porter

    IPC: B81B3/00 ,  B81C1/00 ,  G02B26/08 ,  H01L21/306 ,  H01L21/312 ,  H01L21/00 ,  H01L21/302 ,  H01L21/461

    CPC classification number: B81B3/0005 ,  B81B2201/042 ,  B81C1/0096 ,  B81C2201/112 ,  G02B26/0833 ,  H01L21/02046 ,  H01L21/3121

    Abstract: A method for altering surfaces of a microstructure is disclosed. The modification comprises cleaning the surfaces using an ozone-containing cleaning agent. The modification may also comprise coating the surfaces of the microstructure using a vapor phase coating agent that reacts chemically with the surface. The modification may also comprise coating the surfaces of the microstructure using a lubricant that interacts physically with the surface. The modification can be performed after removal of sacrificial materials of the microstructure during the fabrication process. In particular, the modification method is applicable during the packaging stage for the microstructure.

    Abstract translation: 公开了一种改变微结构表面的方法。 修改包括使用含臭氧的清洁剂清洁表面。 修改还可以包括使用与表面化学反应的气相涂层剂涂覆微结构的表面。 修改还可以包括使用与表面物理相互作用的润滑剂涂覆微结构的表面。 可以在制造过程中去除显微组织的牺牲材料之后进行修改。 特别地，该修改方法适用于微结构的包装阶段。

    Dispensing cap for a container
    8.
    发明授权
    Dispensing cap for a container 有权
    分配容器盖

    公开(公告)号：US08613372B2

    公开(公告)日：2013-12-24

    申请号：US13363953

    申请日：2012-02-01

    Applicant: John Porter

    Inventor： John Porter

    IPC: B65D1/24 ,  B65D25/08 ,  B65D1/36 ,  B65D25/04 ,  B65D57/00 ,  B65D85/00

    CPC classification number: B65D51/2821 ,  B65D41/3428 ,  B65D51/2828 ,  B65D51/2864

    Abstract: A dispensing cap for a container includes a body portion and an integrally formed chamber for holding an additive substance. The body portion includes a closed top end and an inner wall that defines the chamber whose open end is sealed by a chamber closure member. The closed top end includes a diaphragm and a plunger extends axially from the diaphragm within the chamber for unsealing the chamber closure member. The body portion, the closed top end, the plunger, and the inner wall are integrally formed in one-piece.

    Abstract translation: 用于容器的分配帽包括主体部分和用于保持添加剂物质的整体形成的室。 主体部分包括封闭的顶端和限定腔室的内壁，其开口端由腔室闭合构件密封。 封闭的顶端包括隔膜，柱塞在腔室内从隔膜轴向延伸，用于开封腔室闭合构件。 主体部分，封闭的顶端，柱塞和内壁一体地形成为一体。

    Variable resistance circuit
    9.
    发明申请
    Variable resistance circuit 有权
    可变电阻电路

    公开(公告)号：US20060028287A1

    公开(公告)日：2006-02-09

    申请号：US11246469

    申请日：2005-10-07

    Applicant: William Thompson ,  John Porter ,  Larren Weber

    Inventor： William Thompson ,  John Porter ,  Larren Weber

    IPC: H03H7/38

    CPC classification number: G11C7/1051 ,  G11C7/1069 ,  H03H7/40 ,  H03H11/245 ,  H03H11/28 ,  H03H17/0263

    Abstract: A method of finding an unknown value from within a range of values is disclosed that divides the range into weighted subranges and then, beginning with an arbitrary search value within the range, performs a number of simple comparisons to determine the value for each subrange that will result in a match with the target value. This method can also detect those cases where the target value lies outside the range. In one embodiment, the method of finding an unknown value within a range of values is applied to impedance matching. In this embodiment, the output impedance of a pin on an integrated circuit is automatically matched to the impedance of the load connected to it. The output driver has a controllable impedance that can be adjusted within a specific range of impedances to match the external load impedance it is to drive.

    Abstract translation: 公开了一种从值范围内发现未知值的方法，其将范围划分为加权子范围，然后从该范围内的任意搜索值开始执行多个简单比较，以确定每个子范围的值， 导致与目标值匹配。 该方法还可以检测目标值在范围之外的情况。 在一个实施例中，将在值范围内找到未知值的方法应用于阻抗匹配。 在本实施例中，集成电路上的引脚的输出阻抗与连接到其的负载的阻抗自动匹配。 输出驱动器具有可控阻抗，可以在特定阻抗范围内进行调节，以匹配驱动的外部负载阻抗。

    Latch-up prevention for memory cells
    10.
    发明申请
    Latch-up prevention for memory cells 失效
    记忆细胞的锁定预防

    公开(公告)号：US20050286288A1

    公开(公告)日：2005-12-29

    申请号：US11216665

    申请日：2005-08-31

    Applicant: John Porter ,  William Thompson

    Inventor： John Porter ,  William Thompson

    IPC: G11C5/06 ,  G11C11/412 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8244 ,  H01L27/11

    CPC classification number: H01L27/11 ,  G11C11/412 ,  H01L27/1104

    Abstract: An SRAM memory cell is provided having a pair of cross-coupled CMOS inverters. The sources of the pull-up transistors forming each of the CMOS inverters are coupled to VCC through parasitic resistance of the substrate in which each is formed. The source of the p-type pull-up transistor is therefore always at a potential less than or equal to the potential of the N-well such that the emitter-base junction of the parasitic PNP transistor cannot become forward biased and latch-up cannot occur.

    Abstract translation: 提供具有一对交叉耦合CMOS反相器的SRAM存储单元。 形成每个CMOS反相器的上拉晶体管的源极通过其中形成各自的衬底的寄生电阻耦合到V CC。 因此，p型上拉晶体管的源极总是处于小于或等于N阱的电位的电位，使得寄生PNP晶体管的发射极 - 基极结不能变为正向偏置，并且闭锁不能 发生。

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