公开(公告)号：US20090215213A1

公开(公告)日：2009-08-27

申请号：US12387086

申请日：2009-04-27

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01L21/00 ,  H01H11/00

CPC分类号： B81C1/00611 ,  B81C2201/0121 ,  H01H59/0009 ,  H01H2059/0072 ,  Y10T29/49105

摘要： The present invention relates to MEM switches. More specifically, the present invention relates to a system and method for making MEM switches having a common ground plane. One method for making MEM switches includes: patterning a common ground plane layer on a substrate; forming a dielectric layer on the common ground plane layer; depositing a DC electrode region through the dielectric layer to contact the common ground plane layer; and depositing a conducting layer on the DC electrode region so that regions of the conducting layer contact the DC electrode region, so that the common ground plane layer provides a common ground for the regions of the conducting layer

摘要翻译： 本发明涉及MEM开关。 更具体地，本发明涉及一种用于制造具有公共接地层的MEM开关的系统和方法。 制造MEM开关的一种方法包括：在衬底上构图公共接地层; 在公共接地层上形成介电层; 通过所述电介质层沉积DC电极区域以接触所述公共接地层; 以及在所述DC电极区域上沉积导电层，使得所述导电层的区域与所述DC电极区域接触，使得所述公共接地层提供所述导电层的区域的公共接地

公开(公告)号：US20060125031A1

公开(公告)日：2006-06-15

申请号：US11332715

申请日：2006-01-13

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01L21/00 ,  H01L29/82

CPC分类号： B81C1/00611 ,  B81C2201/0121 ,  H01H59/0009 ,  H01H2059/0072 ,  Y10T29/49105

摘要： The present invention relates to MEM switches. More specifically, the present invention relates to a system and method for making MEM switches having a common ground plane. One method for making MEM switches includes: patterning a common ground plane layer on a substrate; forming a dielectric layer on the common ground plane layer; depositing a DC electrode region through the dielectric layer to contact the common ground plane layer; and depositing a conducting layer on the DC electrode region so that regions of the conducting layer contact the DC electrode region, so that the common ground plane layer provides a common ground for the regions of the conducting layer

摘要翻译： 本发明涉及MEM开关。 更具体地，本发明涉及一种用于制造具有公共接地层的MEM开关的系统和方法。 制造MEM开关的一种方法包括：在衬底上构图公共接地层; 在公共接地层上形成介电层; 通过所述电介质层沉积DC电极区域以接触所述公共接地层; 以及在所述DC电极区域上沉积导电层，使得所述导电层的区域接触所述DC电极区域，使得所述公共接地层提供所述导电层的区域的公共接地

公开(公告)号：US20070030104A1

公开(公告)日：2007-02-08

申请号：US11499439

申请日：2006-08-04

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01H53/00

CPC分类号： H01H59/0009

摘要： A micro-electro-mechanical system (MEMS) switch is described. The MEMS switch includes both RF-input and output transmission lines formed on a substrate. An RF armature is anchored to the substrate and is electrically connected with the RF-output transmission line. A contact is electrically connected with the RF-input transmission line. Both bias-input and output signal lines are formed on the substrate. A bias armature is anchored to the substrate and is electrically connected with the bias-input signal line. A DC/RF isolation insulator connects the bias armature with the RF armature. When a charge is introduced to the bias-input signal line, the bias armature is forced toward the bias-output signal line, thereby forcing the RF armature to connect with the contact and form an electrical circuit between the RF-input transmission line and the RF-output transmission line.

摘要翻译： 描述了微机电系统（MEMS）开关。 MEMS开关包括形成在基板上的RF输入和输出传输线。 RF电枢被固定到衬底并且与RF输出传输线电连接。 触点与RF输入传输线电连接。 偏置输入和输出信号线均形成在基板上。 偏置电枢被锚定到衬底并且与偏置输入信号线电连接。 DC / RF隔离绝缘体将偏置电枢与RF电枢连接。 当向偏置输入信号线引入电荷时，偏压电枢被迫朝向偏置输出信号线，从而迫使RF电枢与触点连接，并在RF输入传输线和 射频输出线。

公开(公告)号：US20050183938A1

公开(公告)日：2005-08-25

申请号：US10994704

申请日：2004-11-20

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： B44C1/22 ,  B81B3/00 ,  B81C1/00 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01H1/00 ,  H01H51/22 ,  H01H57/00 ,  H01H59/00 ,  H01L21/00 ,  H01L31/00 ,  H01P1/10

CPC分类号： B81C1/00611 ,  B81C2201/0121 ,  H01H59/0009 ,  H01H2059/0072 ,  Y10T29/49105

摘要： A head electrode region for an electromechanical device is presented, comprising a first insulating layer having electrode region edges; and a head electrode, where the head electrode comprises a locking portion, with the locking portion surrounding the electrode region edges of the first insulating layer such that the head electrode is held fixed relative to the first insulating layer. The head electrode region can further comprise a top region residing above the first insulating layer and a contact region residing below the first insulator, the head electrode region further comprising a second insulating layer formed to cover at least a portion of the top region of the head electrode.

摘要翻译： 本发明提供了一种机电装置的头电极区域，包括具有电极区域边缘的第一绝缘层; 以及头电极，其中所述头电极包括锁定部分，所述锁定部分围绕所述第一绝缘层的电极区域边缘，使得所述头电极相对于所述第一绝缘层保持固定。 磁头电极区域可以进一步包括位于第一绝缘层上方的顶部区域和位于第一绝缘体下方的接触区域，所述磁头电极区域还包括形成为覆盖磁头的顶部区域的至少一部分的第二绝缘层 电极。

公开(公告)号：US20050170637A1

公开(公告)日：2005-08-04

申请号：US10783772

申请日：2004-02-20

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01H57/00 ,  H01H59/00 ,  H01L21/00 ,  H01L21/4763

CPC分类号： H01H59/0009

摘要： A method for pseudo-planarization of an electromechanical device and for forming a durable metal contact on the electromechanical device and devices formed by the method are presented. The method comprises acts of depositing various layers forming a semiconductor device. Two principal aspects of the method include the formation of a planarized dielectric/conductor layer on a substrate and the formation of an electrode in an armature of a microelectromechanical switch, with the electrode formed such that it interlocks a structural layer of the armature to ensure it remains fixed to the armature over a large number of cycles.

摘要翻译： 提出了一种用于机电装置的伪平面化和用于在机电装置上形成耐用金属接触的方法和由该方法形成的装置。 该方法包括沉积形成半导体器件的各种层的动作。 该方法的两个主要方面包括在衬底上形成平坦化的电介质/导体层，以及在微机电开关的电枢中形成电极，其中电极形成为使得电枢的结构层互锁以确保其 在大量的循环中保持固定到电枢上。

公开(公告)号：US20100035387A1

公开(公告)日：2010-02-11

申请号：US12386001

申请日：2009-04-10

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01L21/8232 ,  H02N11/00

CPC分类号： H01L27/0617 ,  B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0742

摘要： A method for fabricating a CMOS-compatible MEMS device is disclosed. In particular, disclosed is a method of ordering the acts in the fabrication process of the two device types such that one device type will not be damaged by the fabrication process of the other device type. One aspect of the method involves first depositing a masking layer over a portion of a substrate layer to isolate areas for the formation of a second device type. The first device type is then fabricated on the unmasked portion of the substrate. A first device is then protected by depositing a masking layer over the first device. Next, a portion of the masking layer over the substrate is removed to expose areas to form a second device type. The second device type is then fabricated on the unmasked portion of the substrate. Finally, the masking layer over the first device type is removed.

摘要翻译： 公开了一种用于制造CMOS兼容MEMS器件的方法。 特别地，公开了一种在两种设备类型的制造过程中排序动作的方法，使得一种设备类型不会被另一设备类型的制造过程损坏。 该方法的一个方面包括首先在衬底层的一部分上沉积掩模层以隔离用于形成第二器件类型的区域。 然后在衬底的未掩模部分上制造第一器件类型。 然后通过在第一设备上沉积掩模层来保护第一设备。 接下来，去除衬底上的掩模层的一部分以暴露区域以形成第二器件类型。 然后在衬底的未屏蔽部分上制造第二器件类型。 最后，去除第一设备类型上的掩蔽层。

公开(公告)号：US07545234B2

公开(公告)日：2009-06-09

申请号：US11332715

申请日：2006-01-13

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01H51/22

CPC分类号： B81C1/00611 ,  B81C2201/0121 ,  H01H59/0009 ,  H01H2059/0072 ,  Y10T29/49105

摘要： The present invention relates to MEM switches. More specifically, the present invention relates to a system and method for making MEM switches having a common ground plane. One method for making MEM switches includes: patterning a common ground plane layer on a substrate; forming a dielectric layer on the common ground plane layer; depositing a DC electrode region through the dielectric layer to contact the common ground plane layer; and depositing a conducting layer on the DC electrode region so that regions of the conducting layer contact the DC electrode region, so that the common ground plane layer provides a common ground for the regions of the conducting layer.

摘要翻译： 本发明涉及MEM开关。 更具体地，本发明涉及一种用于制造具有公共接地层的MEM开关的系统和方法。 制造MEM开关的一种方法包括：在衬底上构图公共接地层; 在公共接地层上形成介电层; 通过所述电介质层沉积DC电极区域以接触所述公共接地层; 以及在所述直流电极区域上沉积导电层，使得所述导电层的区域接触所述直流电极区域，使得所述公共接地层提供所述导电层的区域的公共接地。

公开(公告)号：US06962832B2

公开(公告)日：2005-11-08

申请号：US10783772

申请日：2004-02-20

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01H57/00 ,  H01H59/00 ,  H01L21/00 ,  H01L21/4763

CPC分类号： H01H59/0009

摘要： A method for pseudo-planarization of an electromechanical device and for forming a durable metal contact on the electromechanical device and devices formed by the method are presented. The method comprises acts of depositing various layers forming a semiconductor device. Two principal aspects of the method include the formation of a planarized dielectric/conductor layer on a substrate and the formation of an electrode in an armature of a microelectromechanical switch, with the electrode formed such that it interlocks a structural layer of the armature to ensure it remains fixed to the armature over a large number of cycles.

摘要翻译： 提出了一种用于机电装置的伪平面化和用于在机电装置上形成耐用金属接触的方法和由该方法形成的装置。 该方法包括沉积形成半导体器件的各种层的动作。 该方法的两个主要方面包括在衬底上形成平坦化的电介质/导体层，以及在微机电开关的电枢中形成电极，其中电极形成为使得电枢的结构层互锁以确保其 在大量的循环中保持固定到电枢上。

公开(公告)号：US07230513B2

公开(公告)日：2007-06-12

申请号：US10993805

申请日：2004-11-20

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01P1/10 ,  H01L21/00

CPC分类号： H01P1/12

摘要： A planarized substrate structure for an electromechanical device comprising a substrate layer; a dielectric layer formed on the substrate layer, the dielectric layer formed with conductor spaces therein, the dielectric layer further including a dielectric top surface; and a conducting layer formed as a set of conductors in the conductor spaces of the dielectric layer, the conducting layer having a conducting layer top surface, and where the dielectric top surface and the conducting layer top surface are formed in a substantially co-planar fashion to provide a planarized substrate structure.

摘要翻译： 一种用于机电装置的平面化基板结构，包括基底层; 介电层，其形成在所述基板层上，所述电介质层在其中形成有导体空间，所述电介质层还包括电介质顶面; 以及导电层，其形成为介电层的导体空间中的一组导体，所述导电层具有导电层顶表面，并且其中所述电介质顶表面和所述导电层顶表面以基本上共面的方式形成 以提供平坦化的衬底结构。

公开(公告)号：US20060109069A1

公开(公告)日：2006-05-25

申请号：US10993805

申请日：2004-11-20

申请人： Chia-Shing Chou

发明人： Chia-Shing Chou

IPC分类号： H01P1/10

CPC分类号： H01P1/12

摘要： A planarized substrate structure for an electromechanical device comprising a substrate layer; a dielectric layer formed on the substrate layer, the dielectric layer formed with conductor spaces therein, the dielectric layer further including a dielectric top surface; and a conducting layer formed as a set of conductors in the conductor spaces of the dielectric layer, the conducting layer having a conducting layer top surface, and where the dielectric top surface and the conducting layer top surface are formed in a substantially co-planar fashion to provide a planarized substrate structure.

摘要翻译： 一种用于机电装置的平面化基板结构，包括基底层; 介电层，其形成在所述基板层上，所述电介质层在其中形成有导体空间，所述电介质层还包括电介质顶面; 以及导电层，其形成为介电层的导体空间中的一组导体，所述导电层具有导电层顶表面，并且其中所述电介质顶表面和所述导电层顶表面以基本上共面的方式形成 以提供平坦化的衬底结构。