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公开(公告)号：US10727307B2
公开(公告)日：2020-07-28
申请号：US15351878
申请日：2016-11-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xiaming Zhu
IPC: H01L29/786 , H01L29/417 , H01L29/66 , H01L27/12
Abstract: A display substrate and a fabrication method thereof, and a display device are disclosed. The fabrication method of a display substrate, includes forming a first gate electrode on a transparent base substrate; forming a transparent gate insulating layer on the first gate electrode; forming a transparent active layer on the transparent gate insulating layer; forming a transparent source electrode and a transparent drain electrode on the transparent active layer, wherein, the transparent source electrode and the transparent drain electrode do not overlap with the first gate electrode in a thickness direction of the transparent base substrate.
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2.发明授权公开(公告)号：US10256315B2
公开(公告)日：2019-04-09
申请号：US15320332
申请日：2016-03-07
Applicant: Boe Technology Group Co., Ltd.
Inventor： Chunsheng Jiang , Xuyuan Li , Wei Liu , Xiaming Zhu
IPC: H01L27/12 , H01L29/423 , H01L29/786 , H01L29/49 , H01L29/45
Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The thin film transistor comprises a copper gate, a gate insulating layer, an active layer, a source, and a drain. The thin film transistor further comprises a copper alloy layer which is arranged on a side of the gate facing the active layer.
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公开(公告)号：US09477106B2
公开(公告)日：2016-10-25
申请号：US14103274
申请日：2013-12-11
Inventor： Xiaming Zhu , Liang Sun , Jianfeng Yuan , Seung Moo Rim , Xibin Shao
IPC: G02F1/1362 , G02F1/1345 , G02F1/1333 , G02F1/13 , G02F1/1343
CPC classification number: G02F1/1333 , G02F1/1309 , G02F1/1345 , G02F1/136204 , G02F1/136286 , G02F2001/134372 , G02F2201/121 , G02F2202/22
Abstract: The present invention provides an array substrate of LCD display and a manufacturing method thereof, the array substrate comprises a transparent substrate, gate lines and data lines which are disposed on the transparent substrate, wherein the array substrate further comprises: a transparent conducting bar and a gate short-circuit bar which are disposed on the transparent substrate, said transparent conducting bar is disposed below said gate short-circuit bar, said gate short-circuit bar and said data lines are arranged in a same layer. The present invention can avoid the problem of burning the gate short-circuit bar due to the occurrence of static discharge, the electrical defects in the array substrate can be normally detected and repaired in the array test process, thus the qualified product rate of the array substrate of LCD display is improved.
Abstract translation: 本发明提供一种LCD显示器的阵列基板及其制造方法，所述阵列基板包括透明基板，设置在所述透明基板上的栅极线和数据线，其中所述阵列基板还包括透明导电棒和 栅极短路棒，其设置在透明基板上，所述透明导电棒设置在所述栅极短路棒的下方，所述栅极短路棒和所述数据线布置在同一层中。 本发明可以避免由于发生静电放电而烧毁栅极短路棒的问题，阵列基板中的电气缺陷可以在阵列测试过程中正常检测和修复，从而使阵列的合格产品率 液晶显示器的基板得到改善。
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4.发明申请公开(公告)号：US20170256621A1
公开(公告)日：2017-09-07
申请号：US15320332
申请日：2016-03-07
Applicant: Boe Technology Group Co., Ltd.
Inventor： Chunsheng Jiang , Xuyuan Li , Wei Liu , Xiaming Zhu
IPC: H01L29/423 , H01L29/786 , H01L27/12 , H01L29/49
CPC classification number: H01L29/42384 , H01L27/124 , H01L27/1259 , H01L29/458 , H01L29/4908 , H01L29/786
Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The thin film transistor comprises a copper gate, a gate insulating layer, an active layer, a source, and a drain. The thin film transistor further comprises a copper alloy layer which is arranged on a side of the gate facing the active layer.
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公开(公告)号：US09590231B2
公开(公告)日：2017-03-07
申请号：US14353792
申请日：2013-12-17
Inventor： Huibin Guo , Shoukun Wang , Xiaowei Liu , Xiaming Zhu , Zongjie Guo
IPC: H01K3/10 , H01M4/02 , H01M4/04 , H05K1/02 , H05K1/09 , G02F1/1362 , B33Y10/00 , B33Y80/00 , H05K1/11 , G02B27/22 , H05K1/03 , H05K3/06
CPC classification number: H01M4/02 , B33Y10/00 , B33Y80/00 , G02B27/2214 , G02F1/136286 , H01M4/0404 , H05K1/0284 , H05K1/0296 , H05K1/0306 , H05K1/09 , H05K1/115 , H05K3/064 , H05K2201/0108 , H05K2201/0326 , H05K2201/10136
Abstract: An embodiment of the present invention discloses a 3D barrier substrate and a method for manufacturing the same, and a display device in order to improve the utilization of facilities, increase the production efficiency, and decrease the cost of production. The method of manufacturing 3D barrier substrate comprises: forming a transparent electrode thin film on a substrate, and forming a passivation layer on the transparent electrode thin film; forming an transparent electrode and a passivation layer via hole by a patterning process, wherein the via hole is used for coupling the transparent electrode to the signal line; and forming a signal line, wherein the signal line is coupled to the transparent electrode through the via hole.
Abstract translation: 本发明的一个实施例公开了一种3D屏障基板及其制造方法以及用于提高设备利用率，提高生产效率，降低生产成本的显示装置。 制造3D阻挡衬底的方法包括：在衬底上形成透明电极薄膜，并在透明电极薄膜上形成钝化层; 通过图案化工艺形成透明电极和钝化层通孔，其中通孔用于将透明电极耦合到信号线; 以及形成信号线，其中所述信号线通过所述通孔耦合到所述透明电极。
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Patent Agency Ranking
公开(公告)号：US20150194660A1
公开(公告)日：2015-07-09
申请号：US14353792
申请日：2013-12-17
Inventor： Huibin Guo , Shoukun Wang , Xiaowei Liu , Xiaming Zhu , Zongjie Guo
CPC classification number: H01M4/02 , B33Y10/00 , B33Y80/00 , G02B27/2214 , G02F1/136286 , H01M4/0404 , H05K1/0284 , H05K1/0296 , H05K1/0306 , H05K1/09 , H05K1/115 , H05K3/064 , H05K2201/0108 , H05K2201/0326 , H05K2201/10136
Abstract: An embodiment of the present invention discloses a 3D barrier substrate o and a method for manufacturing the same, and a display device in order to improve the utilization of facilities, increase the production efficiency, and decrease the cost of production. The method of manufacturing 3D barrier substrate comprises: forming a transparent electrode thin film on a substrate, and forming a passivation layer on the transparent electrode thin film; forming an transparent electrode and a passivation layer via hole by a patterning process, wherein the via hole is used for coupling the transparent electrode to the signal line; and forming a signal line, wherein the signal line is coupled to the transparent electrode through the via hole.
Abstract translation: 本发明的一个实施例公开了一种3D阻挡基板及其制造方法，以及为了提高设备利用率，提高生产效率，降低生产成本的显示装置。 制造3D阻挡衬底的方法包括：在衬底上形成透明电极薄膜，并在透明电极薄膜上形成钝化层; 通过图案化工艺形成透明电极和钝化层通孔，其中通孔用于将透明电极耦合到信号线; 以及形成信号线，其中所述信号线通过所述通孔耦合到所述透明电极。
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7.发明授权公开(公告)号：US11695075B2
公开(公告)日：2023-07-04
申请号：US16909017
申请日：2020-06-23
Applicant: BOE Technology Group Co., Ltd.
Inventor： Xiaming Zhu
IPC: H01L29/786 , H01L27/12 , H01L29/66
CPC classification number: H01L29/78618 , H01L27/1222 , H01L29/66742
Abstract: The disclosure provides a thin film transistor, a method of manufacturing the thin film transistor, an array substrate and a display device, belongs to the field of display technology, and can solve the problem that an existing thin film transistor is prone to cracking or breaking due to bending. The thin film transistor of the present disclosure includes a substrate and an active layer arranged on the substrate, and at least one groove is arranged on a surface of the active layer distal to the substrate.
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公开(公告)号：US11239263B2
公开(公告)日：2022-02-01
申请号：US16074283
申请日：2018-01-23
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Tianmin Zhou , Wei Yang , Lizhong Wang , Xiaming Zhu , Jipeng Song
IPC: H01L27/12 , H01L29/786 , H01L33/44
Abstract: A thin film transistor, a method for manufacturing the same and a display device are disclosed. The thin film transistor includes source-drain electrodes and a passivation layer; an isolation layer is disposed between the source-drain electrodes and the passivation layer, and the isolation layer overlays the source-drain electrodes.
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公开(公告)号：US10340389B2
公开(公告)日：2019-07-02
申请号：US15329180
申请日：2015-11-12
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xiangyong Kong , Xiaming Zhu , Xiaodi Liu
IPC: H01L29/786 , H01L21/28 , H01L29/66 , H01L29/76 , H01L27/12 , H01L29/24 , H01L29/417 , H01L29/423
Abstract: The present disclosure discloses in embodiments a thin film transistor and a manufacturing method thereof, an array substrate. The thin film transistor comprises: a base substrate, an active layer, a source, a gate, and a drain. Two ends of the active layer are connected to the source and the drain, respectively. The gate comprises a top gate and a bottom gate arranged opposite to each other in a direction perpendicular to the base substrate, the top gate comprising a top gate top portion and a top gate side portion connected to the top gate top portion, the top gate side portion extending from the top gate top portion towards the base substrate. The active layer is sandwiched between the top gate top portion and the bottom gate. A sidewall of the active layer is at least partially surrounded by the top gate side portion.
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公开(公告)号：US09229286B2
公开(公告)日：2016-01-05
申请号：US14108856
申请日：2013-12-17
Inventor： Xiaming Zhu , Liang Sun , Jianfeng Yuan , Seung Moo Rim , Xibin Shao
IPC: G02F1/1333 , G02F1/1362 , H01L27/12
CPC classification number: G02F1/136204 , H01L27/124
Abstract: According to one aspect of the present invention, the provided is an array substrate. Specifically, the first conductive strip that is coupled to the first data shorting bar and the second conductive strip that is coupled to the second data shorting bar are formed on the array substrate. The width of the first conductive strip is greater than the width of the first data shorting bar. The width of the second conductive strip is greater than the width of the second data shorting bar. The first conductive strip is overlapped with the second conductive strip. Such a structure of the array substrate effectively increases the overlapped capacitance between the data metal layer and the gate metal layer.
Abstract translation: 根据本发明的一个方面，提供了一种阵列基板。 具体地，耦合到第一数据短路棒的第一导电条和耦合到第二数据短路棒的第二导电条形成在阵列基板上。 第一导电条的宽度大于第一数据短路条的宽度。 第二导电条的宽度大于第二数据短路条的宽度。 第一导电带与第二导电带重叠。 阵列基板的这种结构有效地增加了数据金属层与栅极金属层之间的重叠电容。
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